ABSTRACT
The aim of this study is to present a new structure for switchedcapacitor multilevel inverters (SCMLIs) which can produce a great number of voltage levels with optimum number of components for both symmetric and asymmetric value of dc voltage sources.
CONVERTER
planned topology consists of a new switchedcapacitor dc/dc converter (SCC) which has boost ability and can charge capacitors as selfbalancing by using planned binary asymmetrical algorithm and seriesparallel conversion of power supply.
MULTILEVEL INVERTER
planned SCC unit is used in new configuration as a submultilevel inverter (SMLI) and then, these planned SMLIs are cascaded together and create a new cascaded multilevel inverter topology which is able to increase the number of output voltage levels remarkably without using any full Hbridge cell and also can pass the reverse current for inductive loads.
HALF BRIDGES
In this case, two half bridges modules besides two additional switches are employed in each of SMLI units instead of using a full Hbridge cell which contribute to reduce the number of involved components in the current path, value of blocked voltage, the variety of isolated
SWITCHES
dc voltage sources and as a result the overall cost by less number of switches in comparison with other presented topologies. The validity of the planned SCMLI has been carried out by several simulation and experimental results.
KEYWORDS
 Cascade submultilevel inverter
 Seriesparallel conversion
 Selfcharge balancing
 Switchedcapacitor
SOFTWARE: MATLAB/SIMULINK
CIRCUIT DIAGRAM:
Fig. 1. Proposed 17level structure
EXPECTED SIMULATION RESULTS

 (a)
 (b)
Fig. 2. Steady states output voltage and current waveforms (a) in simulation Fig. 12. Transient states of output waveforms in simulation (b) in experiment ( 250V/div& 2A/div)
Fig. 3. Transient states of output waveforms in simulation
 (a) (b)
Fig. 4. Harmonic orders (a) output voltage (b) output current in simulation
Fig. 5. Observed output voltage waveform at noload condition (250V/div)
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(b)
Fig. 6. Capacitors’ voltage ripple waveforms for first case study (a) in simulation (b) in experiment (25 V/dev&50V/div)
Fig. 7. Blocked voltage waveforms across switches of S_{1} (25V/div), S_{2} (100V/div), T_{1} (50V/div), T_{2} and T_{3} (100V/div) from left to right in the experiment
(a)
(b)
Fig. 8. Output voltage and current waveforms for (a) inductive load in experiment (250 V/div & 2 A/div) (b) sudden step load in simulation
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(b)
Fig. 9. Observed capacitors’ current (a) in simulation (b) in experiment (2A/div)
Fig. 10. (a) laboratory prototype (b) Output 49level voltage and current waveforms in the experiment (250V/div & 2A/div)
Fig. 11. Across voltage waveforms of capacitors in upper and lower stages of SCCs in proposed 49level inverter (a) v _{C }_{1} lower stage (5V/div) (b) v _{C }_{2} lower stage (10V/div) (c) v _{C }_{1} upper stage(25V/div) (d) v _{C }_{2} upper stage(50V/div)
CONCLUSION
In this paper, at the first, a new reduced element SCC topology was given which has boost capability remarkably and also can pass the reverse current for inductive loads through existing power switches. The voltage of all capacitors in this structure is balanced by binary asymmetrical algorithm.
SCC
Next, a new submultilevel structure based on suggested SCC was planned which can generate all of the voltage levels at the output (even and odd). In this case, the normal output Hbridge cell used to convert the polarity of SCC units, has been removed, therefore number of needed IGBTs and other involved components, are decreased.
CSMLI
After that, an optimizing operation was given which could obvious the number of needed capacitors in each of SCC units that participate in the cascade submultilevel inverter (CSMLI) to generate maximum number of output voltage levels with less number of elements. Moreover broad connection were given which prove
TOPOLOGIES
the differences between improve symmetric and asymmetric CSMLIs in contrast to some of recently given topologies in variety aspects. Finally, to confirm the work and efficiency of planned CSMLI, several simulation and experimental results have been presented.
REFERENCES
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