This paper proposes a switched-capacitor multilevel inverter for high frequency AC power distribution systems. The proposed topology produces a staircase waveform with higher number of output levels employing fewer components compared to several existing switched capacitor multilevel inverters in the literature. This topology is beneficial where asymmetric DC voltage sources are available e.g. in case of renewable energy farms based AC microgrids and modern electric vehicles. Utilizing the available DC sources as inputs for a single inverter solves the major problem of connecting several inverters in parallel. Additionally, the need to stack voltage sources, like batteries or super-capacitors, in series which demand charge equalization algorithms, are eliminated as the voltage sources employed share a common ground. The inverter inherently solves the problem of capacitor voltage balancing as each capacitor is charged to the value equal to one of input voltage every cycle. State analysis, losses and the selection of capacitance are examined. Simulation and experimental results at different distribution frequencies, power levels and output harmonic content are provided to demonstrate the feasibility of the proposed multilevel inverter topology.
- HFAC power distribution
- High frequency DC/AC Inverter
- Multilevel inverter
- Selective harmonic elimination
Fig. 1: Proposed 7 level SCMLI topology
EXPECTED SIMULATION RESULTS
Fig. 2: Simulation waveforms at 400 Hz including nonidealities : (a) output voltage and current (b) switched capacitor voltage and current
A novel SCMLI topology for HFAC PDS has been proposed in this paper. The topology is applicable where unequal DC input sources are at disposal. Such scenarios are common in large renewable energy farms and electric vehicle networks. It is more convenient to employ multiple DC sources as input to a single inverter than to employ several inverters in parallel with their respective solitary DC input sources. This topology does not stack up the voltage sources in series and therefore does not require voltage balancing circuits. Since the switched capacitors employed copy the input voltage every cycle, the problem of voltage balancing has also been eliminated. The harmonic content in the waveform is analyzed and is found to be minimum. The proposed topology obtains higher number of voltage levels compared to several existing topologies. This paper utilizes the proposed topology for high frequency AC distribution. However, the same topology can be employed for 50 Hz / 60 Hz distribution by employing a larger switched capacitor. It is shown that the number of output voltage levels exponentially increase with increase in the employed input voltage sources and SCs. In the hardware results, it is shown that the 5th and 7th harmonics are minimized to very low value of 1V each. Results at different distribution frequencies and power levels are presented.
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