Modified Phase-Shifted PWM Scheme for Reliability Improvement in Cascaded H-Bridge Multilevel Inverters


The cascaded H-bridge multilevel inverter (CHMI) is a modular structure that consists of many

power semiconductor switches.With this increase in the number of power semiconductor switches, it is hard to predict and handle the failure of the devices, and hence reliability of CHMI decreases. The major cause of power semiconductor switch failure is junction temperature that is produced by power losses. The study proposes a multi-carrier pulse-width modulation (PWM) scheme for reduction in switching losses of CHMI. In the proposed modulation scheme, the two legs conduct switching operation at different frequencies for switching reduction. One leg conducts switching operation with high frequency, while the other leg conducts switching operation with fundamental frequency. The switching operations with different frequencies cause unbalanced switching loss to each leg. Therefore, the junction temperature that is based on power losses leads to different life-times for the power semiconductor switch. Additionally, the switching frequency of the two legs is alternated to evenly distribute switching losses and junction temperature. Simulation and experimental results verify the performance of the proposed PWM scheme.


  1. Cascaded H-bridge multilevel inverter
  2.  Phase-shifted pulse-width modulation scheme
  3. Reliability of power semiconductor switch
  4. Switching loss reduction



Figure 1. Circuit Configuration of Three-Phase CHMI.


Figure 2. Simulation of Conventional PS-PWM Scheme.

Figure 3. Simulation of Proposed PS-PWM Scheme In 5-Level CHMI.

Figure 4. Simulation of Proposed PS-PWM Scheme In 9-Level CHMI.


This paper proposes a modulation method for a 5-level three phase CHMI to extend the life-time and improve reliability of power semiconductor switches. The proposed method is based on the PS-PWM scheme and decreased power losses via the clamped modulation period. The existing reference voltage waveform is modified into two-type reference voltage waveforms to inject the clamped modulation period. The clamped signal reduces power loss, and other signal is reconfigured to maintain the quality of output waveforms such as the level of output voltage. Reduced power losses decrease the temperature of the power semiconductor switch, and thus the expected life-time of the power semiconductor switch is extended by using the proposed modulation method. Additionally, the proposed modulation scheme considers the power loss balance among the switches in the same cell to improve the reliability of the CHMI. The rotation method with 1/4 period is applied to proposed scheme for even switching loss and temperature among switches. Therefore, the all switches in proposed method are decreased temperature and increased life-time evenly. The performance of the proposed method is verified via simulation and experimental results.


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