FPGA-Based Pulse-Width Modulation Control for Single-Phase Multilevel Inverter Top Electrical Projects


Presented is pulse-width modulation (PWM) for single-phase five-level inverter via field-programmable gate array (FPGA). The proposed inverter has conventional full bridge configuration and one bidirectional switch. The control technique is digitally generated based on multicarrier PWM in Altera DE2 board, which has many features that allow implementation of the system design through Cyclone II FPGA device. A sinusoidal reference signal and two triangular carrier signals in phase and of the same frequency but different offset voltages were used to generate the PWM signals for the inverter switches. Besides Altera Quartus II software, Matlab/Simulink software was used to simulate and verify the proposed circuit before it was implemented in a prototype hardware. Simulation and experiment results closely agreed.


  1. Pulse-width modulation (PWM)
  2. FPGA
  3. Multilevel inverter.



Figure 1. The five-level inverter equipped with LC filter and a resistive load.


Figure 2. Simulation results for PWM switching patterns on (a)Quartus II, (b) Matlab/Simulink.

Figure 3. Simulation result for the dead-time designed on Quartus II.


Figure 4. Simulation result for the output voltage waveforms, before and after filtering.

Figure 5, Simulation result for the output voltage and load current waveforms.

Figure 6. THD of the filtered ac voltage.


PWM switching patterns were applied to the proposed inverter switches to produce a five-level output voltage. Altera FPGA enabled fast, flexible design and implementation. Simulation and experiment results were satisfactory for pulse generation, the five-level output voltage and the filtered output voltage and current.


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