Four-Level Three-Phase Inverter With Reduced Component Count for Low and Medium Voltage Applications


Four-Level Three-Phase Inverter This paper proposes a novel three-phase topology with a reduced component count for low- and medium-voltage systems. It requires three bidirectional switches and twelve unidirectional switches for producing four-level voltages without using flying capacitors or clamping diodes, reducing the size, cost, and losses. Removing flying capacitors and clamping diodes allows it to simplify control algorithms and increase the reliability, efficiency, and lifetime.


Four-Level Three-Phase Inverter A modified low-frequency modulation (LFM) scheme is developed and implemented on the proposed topology to produce a staircase voltage with four steps. Further, a level-shifted pulse width modulation (LSPWM) is used to reduce the filter size and increase the output voltage controllability. In this study, a voltage balancing control algorithm is executed to balance the DC-link capacitor voltages.


Four-Level Three-Phase Inverter The performance of the proposed topology is numerically demonstrated and experimentally validated on an in-house test setup. Within the framework, the power loss distribution in switches and conversion efficiency of the proposed circuit are studied, and its main features are highlighted through a comparative study.


  1. DC-AC converters
  2. Four-level inverters
  3. Low and medium voltage applications
  4. Multilevel inverters
  5. Three-phase inverters



Figure 1. The Proposed Four-Level Topology. (A) Multiple Sources Configuration (Msc), Recommended For Energy Systems, (B) Single Source Configuration (Ssc), Recommended For Industrial Applications.


Figure 2. Pole Voltages Va0, Vb0, And Vc0 Using Lfm (A) Simulation,

Figure 3. Pole Voltages Va0, Vb0, And Vc0 Using Lspwm (A) Simulation,

Figure 4. Line Voltages Vab, Vbc, And Vca Using Lfm (A) Simulation,

Figure 5. Line Voltages Vab, Vbc, And Vca Using Lspwm (A) Simulation,

Figure 6. Obtained Vab, Van, And Ian When Feeding R-Load (A) Simulation(C) Simulation (Lspwm),

Figure 7. Obtained Vab, Van, And Ian For R-L Load Using Lfm (A) Simulation,

Figure 8. Obtained Vab, Van, And Ian For R-L Load Using Lspwm (A) Simulation,


This paper proposes a novel inverter topology with a reduced component count, being attractive in low- and medium-voltage applications. The proposed circuit generates four voltage levels without requiring flying capacitors or clamping diodes, reducing the size, cost, control complexity of the inverter and enhancing its reliability and lifetime.


Several simulation and experimental tests were presented to validate the proposed topology performance at resistive and inductive loads. The proposed inverter was compared with the recently developed four-level topologies to highlight its merits. Moreover, its conversion efficiency was analysed when varying the switching frequency, modulation schemes, and loads.


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[4] M. N. Raju, J. Sreedevi, R. P Mandi, and K. S. Meera, “Modular multilevel converters technology:Acomprehensive study on its topologies, modelling, control and applications,” IET Power Electron., vol. 12, no. 2, pp. 149_169, Feb. 2019.

[5] A. Salem, H. Van Khang, K. G. Robbersmyr, M. Norambuena, and J. Rodriguez, “Voltage source multilevel inverters with reduced device count: Topological review and novel comparative factors,” IEEE Trans. Power Electron., vol. 36, no. 3, pp. 2720_2747, Mar. 2021.

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