Crisscross switched multilevel inverter using cascaded semi-half-bridge cells


A new cascaded multilevel inverter (MLI) is presented with the aim of utilizing lesser number of switches, better modularity and reduced voltage stress. The new structure configured under symmetric and asymmetric mode, produces all odd and even voltage levels. This structure comprises semi-half-bridge cells connected in series with crisscross switches to generate any target level for synthesising the sinusoidal output voltage waveform. In extension to the proposed topology, subinverters derived from the proposed MLI are cascaded with an objective to produce more voltage levels with reduced standing voltage. Compared with the cascading H-bridge topology, the proposed MLI and the extended version uses lesser number of semi-conductor switches. The MATLAB R2013b-based simulation results along with the experimental results validate the proposed topology.





Fig.1 Generalised proposed topology and its configuration for nine-level inverter (a) Generalised proposed topology, (b) Proposed topology configured for nine level




Fig.2 Simulation results of the proposed symmetric nine-level inverter for mi = 1, load parameters(R = 150 Ω, L = 100 mH) and without PWM circulation (a) Output voltage, (b) Inductive load current waveform, (c) Output voltage spectrum

Fig.3. Simulation results of current drawn from each source for the proposed symmetric nine-level inverter for mi = 1 and load parameters (R = 165 Ω, L = 20 mH) with PWM circulation (a) Current drawn from source (Va1, Va2), (b) Current drawn from source (Vb1, Vb2)

Fig. 4. Simulation results of output voltage and current of the proposed symmetric nine-level inverter for mi = 1 and load parameters (R = 165 Ω, L = 20 mH)with PWM circulation (a) Output voltage along with Harmonic spectrum, (b) Inductive load current waveform along with Harmonic spectrum

Fig. 5. Output voltage waveform along with harmonic spectrum for the extended structure for mi = 1 (a) Symmetric 13-level inverter, (b) Asymmetric 21-level Inverter



A new MLI topology configured under symmetric and asymmetric structure is presented. The modularity of the topology is suitable to reach any desired voltage level with the advantage of lesser number of power components with reduced blocking voltage over the benchmarked conventional converters. Therefore, the control circuit complexity is reduced and the PWM scheme derived in terms of logic gates was comfortably employed. The prototype was fabricated and the hardware results of 9-level/13-level/15-level and 21-level inverter met the desired output and validated through the simulation results. The presented results project the practical viability of the proposed MLI topology in the field of renewable energy applications.



  • Rodrıguez, J., Lai, J.S., Peng, F.Z.: ‘Multilevel inverters: a survey of topologies, controls, and applications’, IEEE Trans. Ind. Electron., 2002, 49, (4), pp. 724–738
  • Rodriguez, J., Bernet, S., Wu, B., et al.: ‘Multilevel voltage-source-converter topologies for industrial medium-voltage drives’, IEEE Trans. Ind. Electron., 2007, 54, (6), pp. 2930–2945
  • Bose, B.K.: ‘Power electronics and motor drives recent progress and Perspective’, IEEE Trans. Ind. Electron., 2009, 56, (2), pp. 581–588
  • Rodriguez, J., Franquelo, L.G., Kouro, S., et al.: ‘Multilevel converters: An enabling technology for high-power application’, IEEE, 2009, 97, (11), pp. 1786–1817
  • Abu-Rub, H., Holtz, J., Rodriguez, J.: ‘Medium-voltage multilevel converters —state of the art, challenges, and requirements in industrial applications’, IEEE Trans. Ind. Electron., 2010, 57, (8), pp. 2581–2596



Leave a Reply

Your email address will not be published.