Single Phase 21 Level Asymmetric Cascaded Multilevel Inverter With Reduced Number Of Switches And Dc Sources


Multilevel inverter technology has emerged as a very important alternative in the field of medium and high power industrial drive applications. The emergence of multilevel inverters has been increasing since three decades. These new types of converters are suitable for high voltage and high power application due to their ability to synthesize waveforms with better harmonic spectrum. Several multilevel converter topologies have been developed; i) diode clamped, ii) flying capacitors, and iii) cascaded or H-bridge. Cascade Multilevel Inverter (CMI) is one of the productive topology from multilevel family. By increasing the number of output voltage levels in multilevel inverter the Total Harmonic Distortion (THD) can be minimized. This project proposes a new topology of 21 level asymmetric cascaded multilevel inverter with 11 unidirectional switches and 3 diodes and 4 DC voltages sources. Several Pulse Width Modulation techniques are available, among them Level shifting SPWM techniques such as PO, POD and Space Vector PWM are used and comparison is shown on the basis of THDs obtained. MATLAB/ SIMULINK software is used for simulation



In this project, a new topology for 21 levels is proposed with reduced number of switches and DC sources. The Proposed circuit is validated on MATLAB/Simulink platform. The simulation of the 21 level asymmetric cascaded multilevel inverter is successfully done using Space vector, Phase disposition and Phase Opposition disposition pulse width modulation techniques. Thus, this new circuit will require lesser hardware space, lesser cost; also the complexity of the circuit will reduce. From the FFT analysis, it is found that PD PWM and POD PWM techniques give least THD. It is observed that even after the reduction in switches and sources, the desired output is obtained.


  • Jannu Ramu, S.J.V. Prakash, K. Satya Srinivasu, R.N.D. Pattabhi Ram, M. Vishnu Prasad and Md. Mazhar Hussain,” Comparison Between Symmetrical And Asymmetrical Single Phase Seven Level Cascade H-Bridge Multilevel Inverter With PWM Topology,” International Journal of Multidisciplinary Sciences and Engineering, Vol . 3, no. 4, April
  • Karthikeyan, Dr.S.Chenthur Pandian,” An Efficient Multilevel Inverter System For Reducing THD With Space Vector Modulation,” International Journal of Computer Applications (0975 – 8887),Volume 23– No.2, June 2011.
  • Xiaodong Yang, Chonglin Wang, Liping Shi ,Zhenglong Xia,” Generalized Space Vector Pulse Width Modulation Technique For Cascaded Multilevel Inverters,” International Journal of Control and Automation, Vol.7, No.1 (2014), 11-26
  • Balamurugan M.,Gnana Prakash M.,Umashankar S.,” A New Seven Level Symmetric Inverter With Reduced Number Of Switches And Dc Sources,” Advances in Electrical Engineering (ICAEE), 2014 International
  • Elyas Zamiri.,Sajjad Hamkari.,Ebrahim Babaei.,” A New Cascaded Multilevel Inverter Structure With Less Number Of Switches,” 5th Power Electronics, Drive systems and Technologies Conference, 2014 .

Design of a New Combined Cascaded Multilevel Inverter Based on Developed H-Bridge with Reduced Number of IGBTs and DC Voltage Sources


In this paper, a new combined cascaded multilevel inverter with reduced number of switches and DC voltage sources which is formed by series connection of same units with developed H-Bridge is proposed. For the purpose of generating all even and odd voltage levels 5 algorithms to determine the magnitudes of DC voltage sources is proposed. In order to investigate the advantages and disadvantages of the proposed combined cascaded multilevel inverter the proposed algorithms are compared to presented topologies from different points of view. The experimental results of the proposed topology are stated to check and verifying the performance of the proposed topology.


  1. Multilevel inverter
  2. Cascaded multilevel inverter
  3. Combined topology
  4. Developed H-Bridge



In this paper, a new combined cascaded multilevel inverter has been proposed. After that, five different algorithms are proposed in order to determine the magnitudes of the DC voltage sources. By comparing these algorithms, it was concluded that the algorithm which generates a high number of voltage levels with less number of switches and DC voltage sources is better than other algorithms. According to this comparison, it was found that the fifth proposed algorithm is better among the proposed algorithms. In order to prove the claim about reduction of the number of IGBTs and DC voltage sources in the proposed topology, this topology was compared to presented topologies from different aspects. In these comparisons, it was found that the proposed topology generates 31 voltage levels with 14 IGBTs while presented topologies in [4], [10] and [12] generate the same number of voltage levels with 32, 16 and 34 IGBTs, respectively. Also, it was found that this number of voltage levels needs 4 DC voltage sources, whereas, the topologies which presented in [4] and [12] generate 17 and 9 voltage levels with the same  number of DC voltage sources. Afterwards, correctness of performance of the proposed topology and relations have been verified through experimentation of the proposed topology with 2 input units in each side.


[1] C.I. Odeh, E.S. Obe, and O. Ojo,: “Topology for cascaded multilevel inverter,” IET Power Electron., vol. 9, no. 5, pp. 921-929, April 2016.

[2] E. Zamiri, N. Vosoughi, S.H. Hosseini, R. Barzegarkhoo, and M. Sabahi, “A new cascaded switched-capacitor multilevel inverter based on improved series–parallel conversion with less number of components,” IEEE Trans. Ind. Electron., vol. 63, no. 6, pp. 3582-3594, June 2016.

[3] N. Prabaharan and K. Palanisamy, “Analysis of cascaded H-bridge multilevel inverter configuration with double level circuit,” IET Power Electron., vol. 10, no. 9, pp. 1023-1033, July 2017.

[4] M.R. Banaei, M.R. Jannati Oskuee and H. Khounjahan, “Reconfiguration of semi-cascaded multilevel inverter to improve systems performance parameters,” IET Power Electron., vol. 7, no. 5, pp. 1106-1112, May 2014.

[5] E. Babaei, S. Laali, and Z. Bayat, “A single-phase cascaded multilevel inverter based on a new basic unit with reduced number of power switches,” IEEE Trans. Ind. Electron., vol. 62, no. 2, pp. 922-929, Feb. 2015.

Three-Phase Unidirectional Rectifiers with Open-End Source and Cascaded Floating Capacitor H-Bridges


This paper presents two typologies of three-phase semi controlled rectifiers suitable for open-end ac power sources. The rectifiers are composed by a combination of two-level three phase bridges (controlled, semi controlled or uncontrolled), and three single-phase floating capacitor h-bridges (controlled). These typologies generate two powered dc-links, each one belonging to a three-phase bridge. They present a reduced number of controlled power switches if compared to other open-end configurations of similar complexity found in the literature.


It is also proposed a space-vector pulse width modulation (S V P WM) approach and a method of floating capacitor voltage control dedicated to the typologies, with an equivalent approach based on the level-shifted P WM (LS-P WM). The proposed S V P WM solving method is based on a redundant state selection (RS S) technique, which allows the floating capacitors voltage regulation. On the other hand, the LS-P WM solving method is based on the neutral voltage selection, which is shown to be equivalent to the S V P WM RS S technique seen from the control system. Simulation results are shown to validate proposed typologies, as well as the S V-P WM and LS-P WM techniques, and the control strategy. Experimental results are shown to demonstrate proposed configurations feasibility.


Fig. 1: Proposed configurations with open-end power source and cascaded floating h-bridges. (a) Configuration 1, where converter A is a three-phase diode bridge. (b) Configuration 2, where converters A and B have semi-controlled legs.


Fig. 2: Simulation graphics for the conventional configuration 0. (a) Currents i k. (b) Voltages v k, v r k and v 0 s 0. (c) Mean voltages v k, v r k and v 0 s 0.

Fig. 3: Currents i k from simulation results for both proposed configurations with the LS-P WM. (a) For configuration 1. (b) For configuration 2.

Fig. 4: Voltages v 1, v r 1 and v 0 b 0 a from simulation results for both proposed configurations. (a) For configuration 1 with S V-P WM. (b) For configuration 1 with LS-P WM. (c) For configuration 2 with S V-P WM. (d) For configuration 2 with LS-P WM.

Fig. 5: Mean voltages v 1, v r 1 and v 0 b 0 a for both proposed configurations. (a) For configuration 1 with S V-P WM. (b) For configuration 1 with LS-P WM. (c) For configuration 2 with S V-P WM. (d) For configuration 2 with LS-P WM.

Fig. 6: DC capacitors voltages v C ck from simulation results for both proposed configurations with the LS-P WM. (a) For configuration 1. (b) For configuration 2.

Fig. 7: Pole voltages v a 1 0 a, vb 10 b, v c p 10 c 1 and v c n 10 c 1 for both proposed configurations. (a) For configuration 1 with S V-P WM. (b) For configuration 1 with LS-P WM. (c) For configuration 2 with S V-P WM. (d) For configuration 2 with LS-P WM.


In this paper, two configurations of unidirectional rectifiers were proposed. They were based on the cascaded connection of two three-phase bridges with three floating capacitor h bridges (one per-phase), which was allowed by the open-end configuration of the three-phase power source. The voltage regulation of the floating capacitor h-bridges was realized by two proposed PWM solving techniques. The first was applied to the SV-PWM, where methods for redundancy selection and state switching minimization were also proposed. The second was proposed for the LS-PWM as an alternative to the SVPWM.


In this case, the floating capacitors voltage regulation was based in solving the P WM for appropriately selected neutral voltage references. Simulation results were provided to supply evidence that proposed typologies are viable and that proposed S V-P WM redundancy selection technique is effective within the control system. It was also shown that the control based on the LS-P WM was effective and equivalent to the S V-P WM. It could be concluded that the proposed configurations could present lower current TH D and voltage W TH D with fixed switching frequency, as well as lower semiconductor losses with matched current TH D, if compared to the conventional three-phase I B GT rectifier bridge. Simulation results also provided to show the feasibility of proposed typologies and control strategy.


[1] S. Debnath, J. Qin, B. Bahrani, M. Saeedifard, and P. Barbosa, “Operation, control, and applications of the modular multilevel converter: A review,” IEEE Transactions on Power Electronics, vol. 30, no. 1, pp. 37–53, Jan 2015.

[2] R. A. Krishna and L. P. Suresh, “A brief review on multi level inverter topologies,” in 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT), March 2016, pp. 1–6.

[3] F. Z. Peng, W. Qian, and D. Cao, “Recent advances in multilevel converter inverter topologies and applications,” in Power Electronics Conference (IPEC), 2010 International, June 2010, pp. 492–501.

[4] J. Rodriguez, J.-S. Lai, and F. Z. Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” Industrial Electronics, IEEE Transactions on, vol. 49, no. 4, pp. 724–738, Aug 2002.

[5] M. Diaz, R. Cardenas, M. Espinoza, F. Rojas, A. Mora, J. C. Clare, and P. Wheeler, “Control of wind energy conversion systems based on the modular multilevel matrix converter,” IEEE Transactions on Industrial Electronics, vol. 64, no. 11, pp. 8799–8810, Nov 2017.

Dynamic Voltage Conditioner, a New Concept for Smart Low-Voltage Distribution System


ABSTRACT: Power Quality (PQ) improvement in distribution level is an increasing concern in modern electrical power systems. One of the main problems in LV networks is related to load voltage stabilization close to the nominal value. Usually this problem is solved by Smart Distribution Transformers, Hybrid Transformers and Solid-state Transformers, but also Dynamic Voltage Conditioner (DVC) can be an innovative and a cost effective solution. The paper introduces a new control method of a single-phase DVC system able to compensate these long duration voltage drifts. For these events, it is mandatory to avoid active power exchanges so, the controller is designed to work with non-active power only. Operation limits for quadrature voltage injection control is formulated and reference voltage update procedure is proposed to guarantee its continuous operating. DVC performance for main voltage and load variation is examined. Proposed solution is validated with simulation study and experimental laboratory tests. Some simulation and experimental results are illustrated to show the prototype device’s performance.



  1. Power Quality
  2. Power conditioning
  3. Power electronics
  4. Dynamic Voltage Conditioner DVC
  5. Dynamic Voltage Restorer DVR
  6. LV Distribution System
  7. Smart Grid




Fig. 1.  block diagram.



Fig. 2. Simulation – DVC operation limit update procedure under voltage – limits due to : Case 2.b) – (a) grid and minimum grid voltage, (b) PCC and PCC reference voltage, (c) load power factor.

Fig. 3. Experimental – DVC response to load variation, adding and removing the load – (a),(d) PCC voltage, (b),(e) DVC injected voltage, (c),(f) load current.



A new device concept, which goes beyond typical DVR functionalities, is presented. The proposed device is named DVC (Dynamic Voltage Conditioner), it is an active voltage conditioner able to cover both short- and fast-events, as a typical DVR, and long-events (in the grid voltage range from 0.9-1.1 p.u.). So it can perfectly satisfy modern power system DSO requirements. In particular the paper presents only the control strategy that can be adapted during steady state condition (long-events) for a single-phase DVC. Indeed, the steady state condition is not reported in literature and the single phase configuration seems to be the best economic solution for smart grid LV distribution system. The device controller, here introduced for first time, has been designed to operate with non-active power during steady state condition. So, to guarantee DVC continuous working, the paper describes a control method to generate DVC reference voltage considering its limits. Moreover, single-phase design can decrease device initial cost and it is also more compatible with LV distribution and mostly single-phase domestic loads.

Designed control method is verified by MATLAB based simulation and laboratory experimental test bed. Results show that, the device has good performance and it can improve PQ level of the installed distribution Smart Grid network effectively (mainly in the grid voltage range from 0.9-1.1 p.u.). This is essential for nowadays modern network because the proposed DVC can give flexibility to the system operator in order to move all problematic single-phase loads on a specific phase (where the DVC is installed).

Even if the paper analyzed a single-phase system, all the theoretical analysis on device limits can be extended for three phase system and it will be addressed in future works. It should be noted that, this solution since it injects the compensation voltage in quadrature to line current, creates phase shifting on installed phase voltage so, it can impose voltage unbalance issues to the supplied three-phase loads. Therefore this device can be used effectively in LV distribution network with single phase loads only.



  • “IEEE recommended practice for monitoring electric power quality,” IEEE Std 1159-2009 (Revision of IEEE Std 1159-1995), pp. c1–81, June 2009.
  • Sankaran, Power quality. CRC press, 2001.
  • “IEEE application guide for IEEE std 1547(TM), IEEE standard for interconnecting distributed resources with electric power systems,” IEEE Std 1547.2-2008, pp. 1–217, April 2009.
  • Standard, “50160,” Voltage characteristics of public distribution systems, 2010.
  • Farhangi, “The path of the smart grid,” IEEE Power and Energy Magazine, vol. 8, no. 1, pp. 18–28, January 2010.

A High Gain Input-Parallel Output-Series DC/DC Converter with Dual Coupled Inductors


High Gain Input-Parallel Output-Series A topology of arrangement dynamic power channel (SAP F) in view of a solitary stage half-connect fell staggered upset er is proposed so aside repay voltage music of the heap associated with the purpose of basic coupling (P CC).

This paper displays the fundamental parts of the alter er and The proposed transform er with the basic control effectively acquires any voltage reference. Hence, the rearrange er goes about as a consonant source when the reference is a non-sinusoidal flag.


High Gain Input-Parallel Output-Series On the other hand, the proposed converter inherits the merits of interleaved series-connected output capacitors for high voltage gain, low output voltage ripple, and low switch voltage stress. Moreover, the secondary sides of two coupled inductors are connected in series to a regenerative capacitor by a diode for extending the voltage gain and balancing the primary-parallel currents.

In addition, the active switches are turned on at zero current and the reverse recovery problem of diodes is alleviated by reasonable leakage inductances of the coupled inductors. Besides, the energy of leakage inductances can be recycled. A prototype circuit rated 500-W output power is implemented in the laboratory, and the experimental results shows satisfactory agreement with the theoretical analysis.



Fig. 1. Equivalent circuit of the presented converter.


Fig.2 Key theoretical waveforms.



Fig.3 Key experimental current waveforms.


Fig.4 Voltage stress waveforms of power components.


For low info voltage and high advance up power transformation, this paper has effectively built up a high-voltage gain dc– dc converter by information parallel yield arrangement and inductor procedures. The key hypothetical waveforms, relentless state operational guideline, and the principle circuit execution are talked about to investigate the upsides of the proposed converter. Some critical attributes of the proposed converter are as per the following:


High Gain Input-Parallel Output-Series 1) it can accomplish an a lot higher voltage gain and abstain from working at extraordinary obligation cycle and various turn proportions; 2) the voltage worries of the fundamental switches are low, which are one fourth of the yield voltage under N = 1; 3) the information current can be naturally shared by each stage and low swell flows are gotten at info;


4) the fundamental switches can be turned ON at ZCS with the goal that the primary exchanging misfortunes are decreased; and 5) the current falling rates of the diodes are constrained by the spillage inductance so the diode invert recuperation issue is eased.

In the meantime, there is a principle detriment that the obligation cycle of each switch will be at the very least half under the interleaved control with 180◦ stage move.


[1] C.Cecati, F. Ciancetta, and P. Siano, “A multilevel inverter for photovoltaic systems with fuzzy logic control,” IEEE Trans. Ind. Electron., vol. 57, no. 12, pp. 4115–4125, Dec. 2010.

[2] X. H. Yu, C. Cecati, T. Dillon, and M. G. Simoes, “The new frontier of smart grid,” IEEE Trans. Ind. Electron. Mag., vol. 15, no. 3, pp. 49–63, Sep. 2011.

[3] G. Fontes, C. Turpin, S. Astier, and T. A. Meynard, “Interactions between fuel cell and power converters: Influence of current harmonics on a fuel cell stack,” IEEE Trans. Power Electron., vol. 22, no. 2, pp. 670–678, Mar. 2007.

[4] J. Y. Lee and S. N. Hwang, “Non-isolated high-gain boost converter using voltage-stacking cell,” Electron. Lett., vol. 44, no. 10, pp. 644–645, May 2008.

[5] Z. Amjadi and S. S. Williamson, “Power-electronics-based solutions for plug-in hybrid electric vehicle energy storage and management systems,” IEEE Trans. Ind. Electron., vol. 57, no. 2, pp. 608–616, Feb. 2010.


IEEE Electrical Engineering Projects

Asoka Technologies has a large number of IEEE Electrical Engineering projects for final year BTech and MTech.

Electrical designing for the most part manages the investigation and utilization of power, hardware, and electromagnetism. This field originally turned into a recognizable occupation in the later 50% of the nineteenth century.

Electrical architects regularly hold a degree in electrical designing or electronic building. Rehearsing designers may have proficient confirmation and be individuals from an expert body. Such bodies incorporate the Institute of Electrical and Electronics Engineers (IEEE) and the Institution of Engineering and Technology (proficient society) (IET). Doing ventures in Electrical designing office is an essential errand for understudies. BTech and MTech EEE ventures  can be done in various areas. They are power gadgets and drives,  power frameworks, electrical machines and drives and so forth. Every one of these spaces use many technologies and zones.

We comprehend the significance of IEEE papers for BTech and M.Tech EEE ventures. Thus we hand pick IEEE projects for BTech and M.Tech EEE. We guarantee that the IEEE papers and ventures have enough extension for a two semister venture work or for a last year venture work. If necessary an enhancement over the mimicked outcomes by more up to date and better systems for MTech EEE should likewise be possible. The Matlab/Simulink programming is utilized for doing EEE ventures. We do give direction for paper composing and recommend diaries.

Research paper writing

BTech and MTech EEE activities of different spaces are accessible at Asoka Technologies. We additionally build up your own thoughts. We convey the tasks inside the time span given by the understudies.

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Wind Energy Projects

Wind energy

is a type of sun oriented energy and Wind energy describe the process by which wind is used to create power. Wind turbines convert the active energy in the breeze into mechanical power. A generator can change over mechanical power into power.

Wind Energy Projects is caused by the uneven warming of the climate by the sun but varieties in the world’s surface, and turn of the earth. Mountains and waterways, and vegetation all impact wind stream patterns[2], [3]. Wind turbines convert the energy in wind to power by turning propeller-like sharp edges around a rotor. The rotor turns the drive shaft, which turns an electric generator. Three key components influence the measure of energy a turbine can saddle from the breeze: wind speed, air thickness, and cleared region.

Condition for Wind Power Wind speed

The measure of energy in the breeze changes with the 3D square of the breeze speed. In different words, if the breeze speed duplicates, there is multiple times more energy in the breeze (). Little changes in wind speed largy affect the measure of intensity accessible in the breeze [5].

Thickness of the air

The more thick the air, the more energy gotten by the turbine. Air thickness differs with rise and temperature. Air is less thick at higher heights than adrift dimension, and warm air is less thick than virus air. All else being equivalent, turbines will create more power at lower rises and in areas with cooler normal temperatures[5].

Cleared territory of the turbine

The bigger the cleared territory (the span of the zone through which the rotor turns), the more power the turbine can catch from the breeze. Since cleared region is , where r = sweep of the rotor, a little increment in cutting edge length results in a bigger increment in the power accessible to the turbine