Modeling and Simulation of Impedance Distance Relay for Fault Location and Protection of Single Wire Earth Return Line


Different technologies and resources are utilized to provide electricity access for the rural population around the world. Single wire earth return (SWER) line gets prominent attention around the globe to electrify low load profile customers and remote load like telecom base stations by extending from the nearby medium grid. SWER distribution system is designed by tapping from medium voltage distribution line using an isolation transformer. Unlike other distribution systems, the secondary side of a transformer has an only single line with dedicated perfect grounding system. SWER lines are considered as a cost-effective solution, compared to the three phase grid extension by electric utility companies. Since line route is mostly in rural areas with different geographical topologies, natural and human-made faults are inevitable scenarios on the line. According to a preference of utilities and geographical locations, SWER lines are equipped with over current relay, surge arrestors or reclosers to isolate faulty line during the fault. The two main challenges on SWER line protection are to back up existing over current protection relay when it fails to clear the fault and to locate the location of fault for line maintenance. Technicians patrol up to hundreds of km along SWER line to locate a fault. This activity will be inefficient and time-consuming way of locating the fault. In this paper, we model and simulate the impedance distance relay to back up existing protection system and locate the fault. Our model successfully backs up definite time over current (DTOC) relay for a single line to ground (SLG) faults across the line. Consequently, fault locator-block locates the faulty line position.


  1. SWER
  2. Rural Electrification
  3. Impedance relay
  4. Fault location
  5. Protection



Fig.1.Impedance relay simulation model


Fig.2.Fault cleared by DTOC

Fig.3.Fault cleared by Zone-1 relay

Fig.4.Fault cleared by zone -2 relay


In this paper, the two challenges on SWER line, backup protection of DTOC relay and fault location during fault are addressed. An impedance relay is proposed to backup DTOC relay and to locate faults on SWER line.The simulation is done on MATLAB/SIMULINK on each step of 15km from relay point to the entire line. A fault is simulated at 0.4 s and during the inception of fault, the proposed impedance relay managed to clear the fault according to the intentional time delay set between each zone when DTOC fails to operate. Fault locator-block also measures the fault location by considering fault impedance during a fault. The model can measure a SWER line fault location for a fault impendence of 5Ω and below with less than 3% errors. Whereas, fault impedance compensation is required for a fault impedance greater than 10Ω to achieve better result with minimum error percentage.


[1] P. Cook, “Infrastructure, rural electrification and development,” Energy Sustinable Development , pp. 304-313, 2011.

[2] IEA, “,” IEA, [Online]. Available: [Accessed 10 03 2019].

[3] ESAMP, “Reducing the Cost of Grid Extension for Rural Electrifcation,” The International Bank for Reconstruction and Development 227.200, USA, 2000.

[4] L.MANDENO, “RURAL POWER SUPPLY, ESPECIALLY IN BACK COUNTRY AREAS.,” in Proceedings of the New Zealand Institution of Engineers, Vol. 33 (1947), 1947.

[5] P. Grad, “Energy Source & Distribution,” 2014, 18 May 2014. Available: [Online] [Accessed 11 March 2019].

Transmission Line Protection with Distance Relay


 With the development in science and engineering the power system protection field also get advanced which includes the development of relays .the relays journey started by electromechanical then solid state and now digital and numerical relays .An economical and feasible solution to investigate the performance of relays and protection system offered by modeling of protective relays .Distance relay is one of the effective protective relays that are used for the protection of extra high voltage transmission lines. Distance relays are considered of the high speed class and can provide protection. To detect the fault on transmission lines many distance relays are used but for long transmission line mho relay is most suited. The proposed work is about designing of numerical mho relay in MATLAB / SIMULINK to be used for distance protection schemes of long distance transmission lines with better result and characteristics. The required mho relay algorithm is evaluated by using MATLAB to model the power system under different fault condition and simulate it by using phasor based method available in MATLAB simulation. Thus the modeling and simulation of numerical mho relay gives the improved result and greatly enhance the performance of mho relay


  1. Distance protection
  2. Numerical relays
  3. Matlab/Simulink





This work presents a detailed phasor model for a distance relay of mho characteristics. Mho relays are inherently directional so there is no need for directional elements in the relay model. Here the developed simulation is evaluated for line to line fault on the system, and the results found as Simulation results of different faults regarding type and position show clearly the accurate performance of the developed distance relay model. From results it is seen that speed of operation of numerical mho relay is faster than impedance relay. The model versatility, adaptability and applicability promote it for use in power system simulators. Also, it can be used as a training tool to help users understand how a distance relay works and how settings are performed.


I. P.G. Mclaren SM, G.W. Swift SM, 2. Zhang, E. Dirks, R.P. Jayasinghe, I. Fernandouniversity Of Manitoba, Winnipeg, Manitoba, Canada, R3T 2N2.” A New Directional Element For Numerical Distance Relays” IEEE Transactions On Power Delivery, Vol. 10, No. 2, April 1995.

II. P. G. Mclaren, K. Mustaphi, G. Benmouyal, S. Chano, A. Girgis, C. Henville, M. Kezunovic, L. Kojovic, R. Marttila, M. Meisinger, G. Michel, M. S. Sachdev, V. Skendzic, T. S. Sidhu, And D. Tziouvaras” Software Models For Relays” IEEE Transactions On  Power Delivery, VOL. 16, NO. 2, APRIL 2001.

III. Shailendra Kumar Saroj, Harish Balaga, D. N. Viswakarma (Banaras Hindu University), Varanasi, India ” Discrete Wavelet Transform Based Numerical Protection Of Transmission Line ”, Department Of Electrical Engineering Indian Institute Of Technology

IV. Li-Cheng Wu, Chih-Wen Liu, Ching-Shan Chen,Member, National Taiwan University, Taipei, Taiwa, “Modeling And Testing Ofa Digital Distance Relay Using MATLAB / SIMULINK ,IEEE Transaction On Power Delivery,2005.

V. Eng. Abdlmnam A. Abdlrahem , Dr.Hamid H Sherwali Modelling Of Numerical Distance Relays Using Matlab ”, “IEEE Symposium On Industrial Electronics And Applications”,Octobe,2009.

Implementation and Evaluation a SIMULINK Model of a Distance Relay in MATLAB/SIMULINK


This paper describes the opportunity of implementing a model of a Mho type distance relay with a three zones by using MATLAB/SIMULINK package. SimPowerSystem toolbox was used for detailed modeling of distance relay, transmission line and fault simulation. The proposed model was verified under different tests, such as fault detection which includes single line to ground (SLG) fault, double line fault (LL), double line to ground fault (LLG) and three phase fault, all types of faults were applied at different locations to test this model. Also the Mho R- jX plain was created inside this model to show the trajectory of measured apparent impedance by the relay. The results show that the relay operates correctly under different locations for each fault type. The difficulties in understanding distance relay can be cleared by using MATLAB/SIMULINK software.


  1. Power system protection
  2. Distance relay
  3. Line protection
  5. Apparent Impedance



Figure 1. Overall simulation model


A Mho type distance relay was successfully developed based on MATLAB/SIMULINK package, (each part of the relay is implemented as a separate function). Each function has been created using special blocks of SIMULINK. By testing the behavior of the developed relay model under different fault conditions, the relay model was able to recognize the appropriate fault type. From perspective impedance calculations, the relay model has the ability of indicating the correct zone of operation in all cases. The relay identifiers the fault locations as expected, as the fault location is changed, the measured impedance change consequently. The impedance path which reflects the behavior of the model under different fault conditions was presented and discussed


[1] Anderson. P.M.”Power System Protection”, ISBN 0-07-134323-7 McGraw-Hill,1999.

[2] Muhd Hafizi Idris, Mohd Saufi Ahmad, Ahmad Zaidi Abdullah, Surya Hardi “Adaptive Mho Type Distance Relaying Scheme with Fault Resistance Compensation” 2013 IEEE 7th International Power Engineering and Optimization Conference (PEOCO2013), Langkawi, June 2013.

[3] M. H. Idris, S. Hardi and M. Z. Hassan, “Teaching Distance Relay Using Matlab/Simulink Graphical User Interface”, Malaysian Technical Universities Conference on Engineering and Technology,

November 2012.

[4] L. C. Wu, C. W. Liu and C. S. Chen, “Modeling and testing of a digital distance relay using Matlab/Simulink”, IEEE 2005.

[5] The Math Works, Inc., “SimPowerSystems user‟s guide”, Version 4.6, 2008.

Modified Phase-Shifted PWM Scheme for Improved Reliability in CHB MI

modified phase-shifted pwm scheme for reliability improvement in cascaded h-bridge multilevel inverters


The cascaded H-bridge multilevel inverter (CHMI) is a modular structure that consists of many power semiconductor switches.With this increase in the number of power semiconductor switches, it is hard to predict and handle the failure of the devices, and hence reliability of CHMI decreases. The major cause of power semiconductor switch failure is junction temperature that is produced by power losses. The study proposes a multi-carrier pulse-width modulation (PWM) scheme for reduction in switching losses of CHMI.


One leg conducts switching operation with high frequency, while the other leg conducts switching operation with fundamental frequency. The switching operations with different frequencies cause unbalanced switching loss to each leg. Additionally, the switching frequency of the two legs is alternated to evenly distribute switching losses and junction temperature. Simulation and experimental results verify the performance of the proposed PWM scheme.


  1. Cascaded H-bridge multilevel inverter
  2.  Phase-shifted pulse-width modulation scheme
  3. Reliability of power semiconductor switch
  4. Switching loss reduction



Figure 1. Circuit Configuration of Three-Phase CHMI.


Figure 2. Simulation of Conventional PS-PWM Scheme.

Figure 3. Simulation of Proposed PS-PWM Scheme In 5-Level CHMI.

Figure 4. Simulation of Proposed PS-PWM Scheme In 9-Level CHMI.


This paper proposes a modulation method for a 5-level three phase CHMI to extend the life-time and improve reliability of power semiconductor switches. The proposed method is based on the PS-PWM scheme and decreased power losses via the clamped modulation period. The clamped signal reduces power loss, and other signal is reconfigured to maintain the quality of output waveforms such as the level of output voltage.


Reduced power losses decrease the temperature of the power semiconductor switch, and thus the expected life-time of the power semiconductor switch is extended by using the proposed modulation method.


The rotation method with 1/4 period is applied to proposed scheme for even switching loss and temperature among switches. The performance of the proposed method is verified via simulation and experimental results.


[1] B.Wu, High-Power Converter and AC Drives. Hoboken, NJ, USA:Wiley, 2006.

[2] D. Karwatzki and A. Mertens, “Generalized control approach for a class of modular multilevel converter topologies,” IEEE Trans. Power Electron., vol. 33, no. 4, pp. 2888_2900, Apr. 2018.

[3] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.Wu, J. Rodriguez, M. A. Pérez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553_2580, Aug. 2010.

[4] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multilevel Voltage-Source-Converter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930_2945, Dec. 2007.

[5] G. P. Adam, I. A. Abdelsalam, K. H. Ahmed, and B.W.Williams, “Hybrid multilevel converter with cascaded H-bridge cells for HVDC applications: Operating principle and scalability,” IEEE Trans. Power Electron., vol. 30, no. 1, pp. 65_77, Jan. 2015.

A Single-Carrier-Based its Pulse-Width Modulation Template for Cascaded H-bridge

A Single-Carrier-Based Pulse-Width Modulation Template for Cascaded H-Bridge Multilevel Inverters


Multiplicity of the triangular carrier signals is a criterion for the extension of sinusoidal pulse width modulation, SPWM, to a number of output voltage levels per phase-leg in cascaded H-bridge (CHB) multilevel inverter (MLI). Considering medium and high voltage applications where appreciable number of output voltage levels from CHB MLI is needed, commensurate high number of carrier signals in either classical level- or phase-shifted SPWM scheme for this inverter is inevitable.


High-quality output waveforms from CHB MLI system demands precise synchronization of these multi-carrier signals. Sampling issues, memory constraints and computational delays pose difficulties in achieving this synchronization for real-time digital implementation. This study presents a PWM template for CHB MLI. The developed control concept generates adequate modulation templates for CHB inverter wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range.


These templates can be used on CHB inverter of any level with no further control modification. Nearly even distribution of switching pulses, equal sharing of the overall real power among the constituting power switches and enhanced output voltage quality were achieved with the proposed modulation. For a 3-phase, 7-level CHB, Pulse-Width Modulation simulation and experimental results, for an R-L load, were presented.


  1. Cascaded H-bridge inverter
  2. Sinusoidal pulse-width modulation
  3. Total harmonic distortion



Figure 1. Cascaded H-Bridge Multilevel Inverter Power Circuit.


Figure 2. Simulated Output Voltage And Current Waveforms Of The 7-Level Chb Mli With The Proposed Pwm Scheme. (A) Phase A Individual H-Bridge Output Voltages, (B) Phase-Leg Voltages, (C) Line Voltages, (D) Line Currents.

Figure 3. Simulated Dc-Link Voltages, Fft Analyses Of The Phase-Leg And Line Voltage Waveforms And Real Output Power Waveforms. (A) Dc-Link Voltages For The Whole Phases, (B) Fft Analysis Of The Phase-Leg Voltage Waveform From Ipd, Ps And Proposed Modulation Schemes, (C) Fft Analysis Of The Line Voltage Waveform From Ipd, Ps And Proposed Modulation Schemes, (D) Real Output Power Waveforms Of The Individual H-Bridges With The Proposed Spwm Scheme.

Figure 4. Experimental Output Voltages And Currents. (A) Each H-Bridge’s Output Voltage In Phase `A’, (B Phase-Leg Output Voltages In All The Phases, (C) Output Line Voltages, (D) Output Line Currents.

Figure 5. Experimental Dynamic Responses Of The Inverter System: (A), (B) Change In The Modulation Index Value At Constant Input Dc-Link Voltages; (C), (D) Change In The Input Dc-Link Voltages At Constant Output Load Current.


Presented in this paper is a hybridized single carrier-based pulse width modulation scheme for cascaded H-bridge multilevel inverter. Its operational concept wherein a sinusoidal modulating waveform is Pulse-Width Modulation modified to fit in a single triangular carrier signal range in order to generate the desired output waveform template for the MLI has been explained in detail. The principle of generating the modulating templates is a furtherance of earlier established modulation approaches for multilevel inverters.


It has been shown that the generation of the modulating templates is a clear demonstration of the extension of the well-known bipolar PWM to multi-cascaded H-bridge units. Once the templates are generated, it can be used on CHB inverter of any level with no further control modification; only the parameter N need to be specified Pulse-Width Modulation . From industrial point of view, the presented concept of MWT will find its application in large number of cascaded H-bridge systems because with the proposed modulation, the inverter control system becomes insensitive to the traditional concept of multiplicity of carrier waves as the number of inverter level increases.


This will be highly advantageous since the extra control effort of carrier synchronization will be by-passed in the control algorithm Pulse-Width Modulation. The proposed SPWM ensures nearly even distribution of switching pulses among the constituting power switches using a reverse-voltage-sorting comparison algorithm. Consequently, the real power variations in the entire cascaded H-bridges are kept within a very narrow band.


From our findings, the proposed control approach results in a hybrid modulation scheme that mediates between the phase and level-shifted carrier-based SPWM techniques; thereby inheriting the good features in these two modulation schemes. The performance of the proposed SPWM scheme has been presented through scaled down simulations and experiments on a 3-phase, 7-level CHB inverter; results have been adequately presented.


[1] S. K. Chattopadhyay and C. Chakraborty, “Full-bridge converter with naturally balanced modular cascaded H-bridge waveshapers for offshore HVDC transmission,” IEEE Trans. Sustain. Energy, vol. 11, no. 1, pp. 271_281, Jan. 2020, doi: 10.1109/TSTE.2018.2890575.

[2] X. Zeng, D. Gong, M. Wei, and J. Xie, “Research on novel hybrid multilevel inverter with cascaded H-bridges at alternating current side for highvoltage direct current transmission,” IET Power Electron., vol. 11, no. 12, pp. 1914_1925, Oct. 2018, doi: 10.1049/iet-pel.2017.0925.

[3] R. K. Varma and E. M. Siavashi, “PV-STATCOM: A new smart inverter for voltage control in distribution systems,” IEEE Trans. Sus- tain. Energ., vol. 9, no. 4, pp. 1681_1691, Oct. 2018, doi: 10.1109/ TSTE.2018.2808601.

[4] P. Sotoodeh and R. D. Miller, “Design and implementation of an 11- level inverter with FACTS capability for distributed energy systems,” IEEE J. Emerg. Sel. Topics Power Electron., vol. 2, no. 1, pp. 87_96, Mar. 2014, doi: 10.1109/JESTPE.2013.2293311.

[5] A. Ahmed, M. S. Manoharan, and J.-H. Park, “An efficient single-sourced asymmetrical cascaded multilevel inverter with reduced leakage current suitable for single-stage PV systems,” IEEE Trans. Energy Convers., vol. 34, no. 1, pp. 211_220, Mar. 2019, doi: 10.1109/TEC.2018.2874076.

A Generalized Multilevel Inverter Topology with Reduction of Total Standing Voltage


This paper presents a new multilevel inverter topology with reduced active switches and total standing voltage. The proposed topology can generate a high number of voltage levels in the symmetric configuration. This topology intuitively generates positive and negative cycles without an additional H-bridge unit, which considerably reduces the total standing voltage of the inverter.


A cascaded structure is developed from the proposed topology to create higher voltage levels. To show the novelty of the proposed topology, a thorough comparison between the available and the proposed topologies in terms of the number of switches, standing voltages, and dc-sources is presented. Furthermore, the power loss analysis is carried out for various load values. The feasibility of the proposed nine-level inverter is verified with simulation and experimental results.


  1. Multilevel inverter
  2. Inverter
  3. Blocking voltage
  4. Cascaded structure
  5. Reduced power components



Figure 1. Proposed h-type topology generating 5L.


Figure 2. Simulation results of the proposed 9L inverter for R = 30 W, L = 40mH a) Output voltage waveform with FFT spectrum, b) Output Current with FFT spectrum and (c) blocking voltage on switches P2, S3, S1, S6, S4.

Figure 3. Experimental results of Output voltage and current waveform for proposed 9L inverter (a) at load 30 W-40mH, dynamic load changes (b) from 50 W-60 mH to 30 W-40 mH, (c) from 30 W-40 mH to no-load (d) from no-load to 50 􀀀 60 mH and modulation index variations (e) from 0.4 to 0.6 and (f) from 0.6 to 1.0.

Figure 4. PCond;T , PCond;D , PSw;T , and PSw;D (a) at 0:5kW (b) at 1:0kW, (c) at 1:5kW\ (d) at 2:5kW (e) at 5:5kW and (f) Power Efficiency and Loss


The proposed topology used lower number of power electronics components and reduced dc-sources. Further, the maximum voltage stress on the switch is reduced to 4Vdc for any number of voltage levels in symmetric configuration which is more suitable for medium voltage applications. The simulated and experimental results are presented for various load values.


The sudden load changes and modulation index variations are applied to the proposed topology and it corresponding results are given. Further, the power loss and efficiency of propose topology presented for various load power. It is confirming that the proposed topology is more suitable various load changing applications like AC drives, grid connected PV system etc.


[1] S. A. Teston, M. Mezaroba, and C. Rech, “Anpc inverter with integrated secondary bidirectional dc port for ess connection,” IEEE Transactions on Industry Applications, vol. 55, no. 6, pp. 7358–7367, 2019.

[2] Jing Huang and K. A. Corzine, “Extended operation of flying capacitor multilevel inverters,” IEEE Transactions on Power Electronics, vol. 21, no. 1, pp. 140–147, 2006.

[3] S. P. Gautam, “Novel h-bridge-based topology of multilevel inverter with reduced number of devices,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 7, no. 4, pp. 2323–2332, 2019.

[4] S. A. A. Ibrahim, A. Palanimuthu, and M. A. J. Sathik, “Symmetric switched diode multilevel inverter structure with minimised switch count,” The Journal of Engineering, vol. 2017, no. 8, pp. 469–478, 2017.

[5] S. S. Lee, M. Sidorov, N. R. N. Idris, and Y. E. Heng, “A symmetrical cascaded compact-module multilevel inverter (ccm-mli) with pulse width modulation,” IEEE Transactions on Industrial Electronics, vol. 65, no. 6, pp. 4631–4639, 2018.

Compact Regenerative Braking Scheme for a PM BLDC Motor Driven Electric Two-Wheeler


This Paper presents compact regenerative braking scheme for a PM BLDC motor driven electric two wheeler. Electric vehicles have been attracting unprecedented attention in light of the volatile market prices and prospect of diminishing supplies of fuel. Advances in battery technology and significant improvements in electrical motor efficiency have made electric vehicles an attractive alternative, especially for short distance commuting.


This paper describes the application of Brushless DC (BLDC) motor technology in an electric vehicle with special operation on regenerative braking. BLDC motors are frequently used for electric vehicle due to its high efficiency & robustness. In an electric vehicle, regenerative breaking helps to conserve energy by charging the battery, thus extending the driving range of the vehicle.


  1. Regenerative braking
  2. BLDC Motor
  3. Electric vehicle



Fig. 1 Equivalent circuit of an inverter driven 3- phase PM BLDC motor


Fig. 2. Drive cycle with maximum vehicle speed of 25 kmph (corresponding motor speed 330 rpm)

Fig. 3. Battery power and current during combination of regenerative braking and mechanical braking.

Fig.4. Acceleration signal, brake signal, vehicle speed and distance travelled.

Fig.5. Comparision of SOC for different braking methods


In this paper, the line back –EMF based regeneration Technique is used. The performance presented in this paper gives better than conventional mechanical braking in two wheeler EVs.Ultra capacitor is used as secondary energy storage, with regards to its remarkable properties, has used to improve the acceleration performance and regenerative braking efficiency.


Further, the presented method is the simplest one among the known regenerative methods in terms of the simplicity of the system, ease of implementation. This control system developed higher braking BLDC Motor torque than conventional mechanical braking. The proposed control strategy also gives a higher electric regenerative braking efficiency and better control performance.


In an BLDC Motor electric vehicle, regenerative breaking helps to conserve energy by charging the battery, thus extending the driving range of the vehicle.


[1]Cody J, 2008, “Regenerative Braking Control for a BLDC Motor in Electric Vehicle Applications”, Honours Paper in Bachelor of Engineering degree, University of South Australia, School of Electrical and Information Engineering.

[2] Ehsani, M.; Falahi, M.; Lotfifard, S. Vehicle to grid services: Potential and applications. Energies 2012, 5, 4076–4090.

[3] Falahi, M.; Chou, H.M.; Ehsani, M.; Xie, L.; Butler-Purry, K.L. “Potential power quality benefits of electric vehicles”. IEEE Trans. Sustain. Energy 2013, 4, 1016–1023.

[4]J. Shen, X.J.; Chen, S.; Li, G.; Zhang, Y.; Jiang, X.; Lie, T.T. “Configure methodology of onboard super capacitor array for recycling regenerative braking energy of URT vehicles”. IEEE Trans. Ind. Appl. 2013, 49, 1678–1686.

[5]. Yang, M.-J.; Jhou, H.-L.; Ma, B.-Y.; Shyu, K.-K. “A costeffective method of electric brake with energy regeneration for electric vehicles”. IEEE Trans. Ind. Electron. 2009, 56, 2203– 2212.

Active Power Filter for Harmonic Mitigation of Power Quality Issues in Grid Integrated Photovoltaic Generation System


Single phase supply scheme tied with Photovoltaic arrangement (PV) employed on perturbed & observed (P&O) maximum energy point tracking technique with shunt active power filter allied to a rectifier feed R-L nonlinear load. The traditional Perturbed & Observed technique maximum energy point tracking topology is applied to attained maximum output power from Photovoltaic array(PVA), Proportional Integral conventional controller with phase detector (PD) phase locked loop (PLL) synchronization are executed to produce reference current.


It provide at control unit of pulse width modulation topology( PWM) is utilized in inverter to get steady output voltage. Self supported DC bus PWM converter is regulated from PV array. In proposed architecture is minimized total harmonic pollution existing in supply current owing to power electronic load (PEL). Total current harmonic pollution (THDi) is compensated using dynamic filter shunt active power filter (SAPF) and power factor obtain better later than compensation. Hence, reactive power (KVAR) is delivered through system decrease and active power (KW) enhance. The suggested scheme has been implemented by way of MATLAB/SIMULINK 2015(a) environment.


  1. Shunt Active Power Filter (SAPF)
  2. Photovoltaic Array (PVA)
  3. Proportional Integral controller
  4. Pulse width Modulated (PWM) Converter
  5. Maximum Power Point Tracking (P & O) Scheme



Fig.1 Suggested system schematic.


Fig.2. PV array voltage before boosting.

Fig.3. DC link voltage

Fig.4. Power Factor

Fig.5. Source currents before compensation.

Fig.6. SAPF filter current.

Fig.7.Source current after comopensation as after 0.1 sec.

Fig.8. Graphical representation of active power

Fig.9. Graphical representation of reactive power

Fig.10. Source current harmonic spectrum befor compensation with

rectifier non linear diode load.

Fig.11. Source current harmonic graph after SAPF application.


 In this research paper SAPF based on phase detector circuit (PLL) for unit vector generation with traditional PI controller is implemented. This controller regulates DC side voltage, reference current generated by PI conventional controller and positive progression predictor PLL synchronization unit.


Hysteresis band current control(HBCC) is employed to produce gate signal for voltage source inverter (VSI). The source current THD is abridged to fewer than 5% that is in accordance IEEE-519 standards for harmonic. Active power is improved by dynamic filtering using SAPF and decrease in reactive power consequently, power factor level is become finer.


[1] M. Singh, V. Khadkikar, A. Chandra, and R. K. Varma,“Grid Interconnection of Renewable Energy Sources at the Distribution Level With Power-Quality Improvement Features” IEEE Transactions on Power Delivery, vol. 26, no. 1, January 2011.

[2] S. Agrawal, Seemant Chorsiya, D.K Palwalia, “Hybrid Energy Management System design with Renewable Energy Sources (Fuel Cells, PV Cells and Wind Energy): A Review”, IJSET, vol. 6, no. 3, pp.174-177, 2018. DOI : 10.5958/2277 1581.2017.00104.8.

[3] M. G. Villalva, J. R. Gazoli and E. R. Filho, “Modeling and circuitbased simulation of photovoltaic arrays”, Brazilian Power Electronics Conference, Bonito-Mato Grosso do Sul, pp. 1244-1254, 2009.

[4] S. Agrawal and D. K. Palwalia, “Analysis of standalone hybrid PVSOFC- battery generation system based on shunt hybrid active power filter for harmonics mitigation.” IEEE Power India International Conference (PIICON) pp. 1-6, 2016.

[5] M. M. Hashempour, M. Savaghebi, J. C. Vasquez and J. M. Guerrero, “A Control Architecture to Coordinate Distributed Generators and Active Power Filters Coexisting in a Microgrid”, IEEE Transactions on Smart Grid, vol. 7, no. 5, pp. 2325-2336, Sept. 2016.

The Study of Single-phase PWM Rectifier Based on PR Control Strategy


Synchronous PI controller is usually used to track current in three-phase PWM rectifier with zero steady-state error which is difficult to achieve in the single-phase system. A novel proportional-resonant (PR) control scheme for single-phase PWM rectifier is proposed in the paper. Compared with traditional PI control and current hystereis control (CHC) methods


The PR control structure is simple and can reduce control time delay Significantly. The simulation results verify the feasibility of the proposed control scheme in the disturbance rejection. PWM Rectifier In addition, sinusoidal current zero static error control can be achieved without a coordinate transformation and the DC voltage can automatically adjust to changes of grid voltage, load value and frequency which contributes to energy conversion and bidirectional flow of electricity.


  1. Single-phase rectifiers
  2. CHC control
  3. PR-based control



(a) The topological structure

(b) The current control dynamic block diagram

Fig 1. The topological structure and the current control dynamic block diagram of PWM rectifiers.


(a) The value of DC voltage.

(b) The value of AC current.

(c) Comparison between the feedback current and the referent current

Fig.2. The simulation waves based on CHC control scheme.

(a) The value of DC voltage.

(b) The value of grid voltage and AC current

(c) The value of actual voltage and predictive error.

(d) Comparison between the feedback current and the referent current

Fig 3.The simulation waves based on PR control scheme.

(a) Current Hystereis Control(CHC)

(b) Proportional-Resonant (PR) based control.

Fig 4. The AC current spectrum.


From the above conducted studies, one can conclude that PR-based Control strategy for single-phase PWM rectifier presents better steady-state and can successfully achieve accurate regulation with fast dynamic response with minimum harmonic distortions. The simulation results show that sinusoidal current zero static error control can be achieved without a coordinate transformation and the DC voltage could automatically adjust to changes of grid voltage


load value and frequency which contributes to energy conversion and bidirectional flow of electricity. The control algorithm is easy to be realized while the robustness and power quality is improved. The highlight of paper lies in applying PR regulator to the adjustment of sinusoidal AC current zero static error , building the system model of single-phase PWM rectifier in MATLAB/Simulink with CHC and PR control scheme respectively and giving proper comparisons to some degree.


[1] Song H.S, Nam K, Instantaneous Phase-angle Estimation Algorithm Under Unbalanced Voltage-sag Condition, IEEE Proc Generation, Transmission, and Distribution, Vol.147, No.6, 409-415, 2000.

[2] Zmood D.N, Holmes D.G, Stationary Frame Current Regulation of PWM Inverters with Zero Steady-state Error, IEEE Transactions on Power Electronics, Vol.18, No.3, 814-822, 2003.

[3] Yuan X, Merk W, Stemmler H, Stationary-frame Generalized Integrators for Current Control of Active Power Filters with Zero Steady-state Error for Current Harmonics of Concern Under Unbalance and Distorted Operating Conditions, IEEE Trans on Industry Applications, Vol.38, No.2, 523-532, 2002.

[4] ZHAO Qinglin, GUO Xiaoqiang, WU Weiyang, Research on Control Strategy for Single-phase Grid-connected Inverter, Proceedings of the CSEE, 60-64, 2007.

[5] JIANG Jun-feng, LIU Hui-jin, CHEN Yun-ping, A Novel Double Hystersis Current Control Method of Active Power Filter with Voltage Space Vector. Proceedings of the CSEE, Vol.24, No.10, 82-86, 2004.

Sensorless Start-Up Strategy for a 315 kW High-Speed Brushless DC Motor with Small Inductance and Non-ideal Back-EMF


This paper presented a novel sensorless start-up strategy for a 315kW high-speed magnetic suspension brushless DC (BLDC) motor with small inductance and non-ideal back electromotive force (back-EMF). Two key strategies on the sensorless start-up strategy of BLDC motor were presented: (1) small current start-up strategy for the high-speed BLDC motor with small inductance, and (2) self-adaption control strategy to compensate the commutation error for the BLDC motor with non-ideal back-EMF in the start-up stage.


A hybrid pulse width modulation (PWM) strategy based on the load torque was proposed to limit the start-up current. An optimal motor start-up curve based on the system parameters was presented, and a self-adaption control strategy was proposed to solve the synchronous switching problem. The effectiveness and feasibility of the proposed method were verified by a series of experiments on the 315 kW-20000 rpm magnetic suspension blower platform.


  1. BLDC motor
  2. Small inductance
  3. Non-ideal back-EMF
  4. Sensorless
  5. Start-up strategy
  6. Self-adaption control strategy



Fig. 1. The block diagram of novel sensorless start-up strategy.


Fig. 2. The comparisons experiment results of sensorless start-up strategy. (a) The start-up stage based on traditional sensorless “three-step” start-up method. (b) The start-up stage based on the sensorless start-up strategy proposed in this paper.

Fig. 3. The phase current and line-to-line voltages in the start-up stage without commutation compensation. (a) The synchronous error angle caused the waveform distortion in the start-up stage. (b) The synchronous error angle caused the motor out of step in the start-up stage.

Fig. 4. The comparisons experiment results of sensorless strategy under heavy load. (a) The start-up stage based on traditional sensorless “three step” start-up strategy. (b) The start-up stage based on the sensorless start-up strategy proposed in this paper

Fig.5. The curves of electromagnetic torque and the motor speed when the load torque changed in the start-up stage. (a) The curves under traditional sensorless start-up strategies. (b) The curves under sensorless start-up strategies proposed in this paper.


This paper analyzed the main factors that influence the sensorless start-up performance of the high-power high-speed BLDC motor with small inductance and non-ideal back-EMF. A reliable start-up strategy was proposed by improving the detection of the initial rotor position, the closed-loop acceleration, and the synchronous switching process. The important conclusions were listed as follows.

(1) The rotor initial position can be positioned by the “two step” detection strategy. The start-up current can be adjusted according to the load torque in real time. Therefore, the method proposed in this paper ensured that the motor can start-up successfully under the load condition.

(2) The speed-up curve in the external-synchronization stage was optimized by analyzing the relationship between the motor speed and the terminal voltage. The rotor rotating time from the stationary position to a specify position was obtained by analyzing the average torque in 1/6 cycle and the rotor inherent characteristic.

(3) The synchronous switching process was improved by estimating the commutation error angle and the free decelerating. The influence of the back-EMF shape was analyzed by Eq. (28) and (29). The problems of high frequency noise and the rotor position error were solved by the free decelerating.


[1] A. Boglietti, C. Gerada, A. Cavagnino, “High-speed electrical machines and drives,” IEEE Trans. Ind. Electron., vol. 61, no. 6, pp. 2943-2945, Jun. 2014.

[2] W. Li, J. Fang, H. Li, J. Tang, “Position sensorless control without phase shifter for high–speed BLDC motors with low inductance and non-ideal back EMF,” IEEE Trans. Power Electron., vol. 31, no. 2, pp. 1354–1366, Feb. 2016.

[3] S. Chen, G. Liu, S. Zheng, “Sensorless control of BLDCM drive for a High-Speed maglev blower using a low pass filter,” IEEE Trans. Power Electron., vol. 32, no. 11, pp. 8845–8856, Nov. 2017.

[4] S. Shinnaka, “New “D-state-observer”-based vector control for sensorless drive of permanent-magnet synchronous motors,” IEEE Trans. Ind. Appl., vol. 41, no. 3, pp. 825–833, Jun. 2005.

[5] G. Liu, C. Cui, K. Wang, B. Han, S. Zheng, “Sensorless control for high–speed brushless DC motor based on the line–to–line back EMF,” IEEE Trans. Power Electron., vol. 31, no. 7, pp. 4669–4683, Jul. 2016.