Modified Phase-Shifted PWM Scheme for Reliability Improvement in Cascaded H-Bridge Multilevel Inverters


The cascaded H-bridge multilevel inverter (CHMI) is a modular structure that consists of many

power semiconductor switches.With this increase in the number of power semiconductor switches, it is hard to predict and handle the failure of the devices, and hence reliability of CHMI decreases. The major cause of power semiconductor switch failure is junction temperature that is produced by power losses. The study proposes a multi-carrier pulse-width modulation (PWM) scheme for reduction in switching losses of CHMI. In the proposed modulation scheme, the two legs conduct switching operation at different frequencies for switching reduction. One leg conducts switching operation with high frequency, while the other leg conducts switching operation with fundamental frequency. The switching operations with different frequencies cause unbalanced switching loss to each leg. Therefore, the junction temperature that is based on power losses leads to different life-times for the power semiconductor switch. Additionally, the switching frequency of the two legs is alternated to evenly distribute switching losses and junction temperature. Simulation and experimental results verify the performance of the proposed PWM scheme.


  1. Cascaded H-bridge multilevel inverter
  2.  Phase-shifted pulse-width modulation scheme
  3. Reliability of power semiconductor switch
  4. Switching loss reduction



Figure 1. Circuit Configuration of Three-Phase CHMI.


Figure 2. Simulation of Conventional PS-PWM Scheme.

Figure 3. Simulation of Proposed PS-PWM Scheme In 5-Level CHMI.

Figure 4. Simulation of Proposed PS-PWM Scheme In 9-Level CHMI.


This paper proposes a modulation method for a 5-level three phase CHMI to extend the life-time and improve reliability of power semiconductor switches. The proposed method is based on the PS-PWM scheme and decreased power losses via the clamped modulation period. The existing reference voltage waveform is modified into two-type reference voltage waveforms to inject the clamped modulation period. The clamped signal reduces power loss, and other signal is reconfigured to maintain the quality of output waveforms such as the level of output voltage. Reduced power losses decrease the temperature of the power semiconductor switch, and thus the expected life-time of the power semiconductor switch is extended by using the proposed modulation method. Additionally, the proposed modulation scheme considers the power loss balance among the switches in the same cell to improve the reliability of the CHMI. The rotation method with 1/4 period is applied to proposed scheme for even switching loss and temperature among switches. Therefore, the all switches in proposed method are decreased temperature and increased life-time evenly. The performance of the proposed method is verified via simulation and experimental results.


[1] B.Wu, High-Power Converter and AC Drives. Hoboken, NJ, USA:Wiley, 2006.

[2] D. Karwatzki and A. Mertens, “Generalized control approach for a class of modular multilevel converter topologies,” IEEE Trans. Power Electron., vol. 33, no. 4, pp. 2888_2900, Apr. 2018.

[3] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.Wu, J. Rodriguez, M. A. Pérez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553_2580, Aug. 2010.

[4] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multilevel Voltage-Source-Converter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930_2945, Dec. 2007.

[5] G. P. Adam, I. A. Abdelsalam, K. H. Ahmed, and B.W.Williams, “Hybrid multilevel converter with cascaded H-bridge cells for HVDC applications: Operating principle and scalability,” IEEE Trans. Power Electron., vol. 30, no. 1, pp. 65_77, Jan. 2015.

A Single-Carrier-Based Pulse-Width Modulation Template for Cascaded H-Bridge Multilevel Inverters


Multiplicity of the triangular carrier signals is a criterion for the extension of sinusoidal pulse width modulation, SPWM, to a number of output voltage levels per phase-leg in cascaded H-bridge (CHB) multilevel inverter (MLI). Considering medium and high voltage applications where appreciable number of output voltage levels from CHB MLI is needed, commensurate high number of carrier signals in either classical level- or phase-shifted SPWM scheme for this inverter is inevitable. High-quality output waveforms from CHB MLI system demands precise synchronization of these multi-carrier signals. Sampling issues, memory constraints and computational delays pose difficulties in achieving this synchronization for real-time digital implementation. This study presents a PWM template for CHB MLI. The developed control concept generates adequate modulation templates for CHB inverter wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range. These templates can be used on CHB inverter of any level with no further control modification. Nearly even distribution of switching pulses, equal sharing of the overall real power among the constituting power switches and enhanced output voltage quality were achieved with the proposed modulation. For a 3-phase, 7-level CHB, simulation and experimental results, for an R-L load, were presented.


  1. Cascaded H-bridge inverter
  2. Sinusoidal pulse-width modulation
  3. Total harmonic distortion



Figure 1. Cascaded H-Bridge Multilevel Inverter Power Circuit.


Figure 2. Simulated Output Voltage And Current Waveforms Of The 7-Level Chb Mli With The Proposed Pwm Scheme. (A) Phase A Individual H-Bridge Output Voltages, (B) Phase-Leg Voltages, (C) Line Voltages, (D) Line Currents.

Figure 3. Simulated Dc-Link Voltages, Fft Analyses Of The Phase-Leg And Line Voltage Waveforms And Real Output Power Waveforms. (A) Dc-Link Voltages For The Whole Phases, (B) Fft Analysis Of The Phase-Leg Voltage Waveform From Ipd, Ps And Proposed Modulation Schemes, (C) Fft Analysis Of The Line Voltage Waveform From Ipd, Ps And Proposed Modulation Schemes, (D) Real Output Power Waveforms Of The Individual H-Bridges With The Proposed Spwm Scheme.

Figure 4. Experimental Output Voltages And Currents. (A) Each H-Bridge’s Output Voltage In Phase `A’, (B Phase-Leg Output Voltages In All The Phases, (C) Output Line Voltages, (D) Output Line Currents.

Figure 5. Experimental Dynamic Responses Of The Inverter System: (A), (B) Change In The Modulation Index Value At Constant Input Dc-Link Voltages; (C), (D) Change In The Input Dc-Link Voltages At Constant Output Load Current.


Presented in this paper is a hybridized single carrier-based pulse width modulation scheme for cascaded H-bridge multilevel inverter. Its operational concept wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range in order to generate the desired output waveform template for the MLI has been explained in detail. The principle of generating the modulating templates is a furtherance of earlier established modulation approaches for multilevel inverters. It has been shown that the generation of the modulating templates is a clear demonstration of the extension of the well-known bipolar PWM to multi-cascaded H-bridge units. Once the templates are generated, it can be used on CHB inverter of any level with no further control modification; only the parameter N need to be specified. From industrial point of view, the presented concept of MWT will find its application in large number of cascaded H-bridge systems because with the proposed modulation, the inverter control system becomes insensitive to the traditional concept of multiplicity of carrier waves as the number of inverter level increases. This will be highly advantageous since the extra control effort of carrier synchronization will be by-passed in the control algorithm. The proposed SPWM ensures nearly even distribution of switching pulses among the constituting power switches using a reverse-voltage-sorting comparison algorithm. Consequently, the real power variations in the entire cascaded H-bridges are kept within a very narrow band. From our findings, the proposed control approach results in a hybrid modulation scheme that mediates between the phase and level-shifted carrier-based SPWM techniques; thereby inheriting the good features in these two modulation schemes. The performance of the proposed SPWM scheme has been presented through scaled down simulations and experiments on a 3-phase, 7-level CHB inverter; results have been adequately presented.


[1] S. K. Chattopadhyay and C. Chakraborty, “Full-bridge converter with naturally balanced modular cascaded H-bridge waveshapers for offshore HVDC transmission,” IEEE Trans. Sustain. Energy, vol. 11, no. 1, pp. 271_281, Jan. 2020, doi: 10.1109/TSTE.2018.2890575.

[2] X. Zeng, D. Gong, M. Wei, and J. Xie, “Research on novel hybrid multilevel inverter with cascaded H-bridges at alternating current side for highvoltage direct current transmission,” IET Power Electron., vol. 11, no. 12, pp. 1914_1925, Oct. 2018, doi: 10.1049/iet-pel.2017.0925.

[3] R. K. Varma and E. M. Siavashi, “PV-STATCOM: A new smart inverter for voltage control in distribution systems,” IEEE Trans. Sus- tain. Energ., vol. 9, no. 4, pp. 1681_1691, Oct. 2018, doi: 10.1109/ TSTE.2018.2808601.

[4] P. Sotoodeh and R. D. Miller, “Design and implementation of an 11- level inverter with FACTS capability for distributed energy systems,” IEEE J. Emerg. Sel. Topics Power Electron., vol. 2, no. 1, pp. 87_96, Mar. 2014, doi: 10.1109/JESTPE.2013.2293311.

[5] A. Ahmed, M. S. Manoharan, and J.-H. Park, “An efficient single-sourced asymmetrical cascaded multilevel inverter with reduced leakage current suitable for single-stage PV systems,” IEEE Trans. Energy Convers., vol. 34, no. 1, pp. 211_220, Mar. 2019, doi: 10.1109/TEC.2018.2874076.

A Generalized Multilevel Inverter Topology with Reduction of Total Standing Voltage


This paper presents a new multilevel inverter topology with reduced active switches and total standing voltage. The proposed topology can generate a high number of voltage levels in the symmetric configuration. This topology intuitively generates positive and negative cycles without an additional H-bridge unit, which considerably reduces the total standing voltage of the inverter. A cascaded structure is developed from the proposed topology to create higher voltage levels. To show the novelty of the proposed topology, a thorough comparison between the available and the proposed topologies in terms of the number of switches, standing voltages, and dc-sources is presented. Furthermore, the power loss analysis is carried out for various load values. The feasibility of the proposed nine-level inverter is verified with simulation and experimental results.


  1. Multilevel inverter
  2. Inverter
  3. Blocking voltage
  4. Cascaded structure
  5. Reduced power components



Figure 1. Proposed h-type topology generating 5L.


Figure 2. Simulation results of the proposed 9L inverter for R = 30 W, L = 40mH a) Output voltage waveform with FFT spectrum, b) Output Current with FFT spectrum and (c) blocking voltage on switches P2, S3, S1, S6, S4.

Figure 3. Experimental results of Output voltage and current waveform for proposed 9L inverter (a) at load 30 W-40mH, dynamic load changes (b) from 50 W-60 mH to 30 W-40 mH, (c) from 30 W-40 mH to no-load (d) from no-load to 50 􀀀 60 mH and modulation index variations (e) from 0.4 to 0.6 and (f) from 0.6 to 1.0.

Figure 4. PCond;T , PCond;D , PSw;T , and PSw;D (a) at 0:5kW (b) at 1:0kW, (c) at 1:5kW\ (d) at 2:5kW (e) at 5:5kW and (f) Power Efficiency and Loss


The proposed topology used lower number of power electronics components and reduced dc-sources. Further, the maximum voltage stress on the switch is reduced to 4Vdc for any number of voltage levels in symmetric configuration which is more suitable for medium voltage applications. The simulated and experimental results are presented for various load values. The sudden load changes and modulation index variations are applied to the proposed topology and it corresponding results are given. Further, the power loss and efficiency of propose topology presented for various load power. It is confirming that the proposed topology is more suitable various load changing applications like AC drives, grid connected PV system etc.


[1] S. A. Teston, M. Mezaroba, and C. Rech, “Anpc inverter with integrated secondary bidirectional dc port for ess connection,” IEEE Transactions on Industry Applications, vol. 55, no. 6, pp. 7358–7367, 2019.

[2] Jing Huang and K. A. Corzine, “Extended operation of flying capacitor multilevel inverters,” IEEE Transactions on Power Electronics, vol. 21, no. 1, pp. 140–147, 2006.

[3] S. P. Gautam, “Novel h-bridge-based topology of multilevel inverter with reduced number of devices,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 7, no. 4, pp. 2323–2332, 2019.

[4] S. A. A. Ibrahim, A. Palanimuthu, and M. A. J. Sathik, “Symmetric switched diode multilevel inverter structure with minimised switch count,” The Journal of Engineering, vol. 2017, no. 8, pp. 469–478, 2017.

[5] S. S. Lee, M. Sidorov, N. R. N. Idris, and Y. E. Heng, “A symmetrical cascaded compact-module multilevel inverter (ccm-mli) with pulse width modulation,” IEEE Transactions on Industrial Electronics, vol. 65, no. 6, pp. 4631–4639, 2018.

Compact Regenerative Braking Scheme for a PM BLDC Motor Driven Electric Two-Wheeler


This Paper presents compact regenerative braking scheme for a PM BLDC motor driven electric two wheeler. Electric vehicles have been attracting unprecedented attention in light of the volatile market prices and prospect of diminishing supplies of fuel. Advances in battery technology and significant improvements in electrical motor efficiency have made electric vehicles an attractive alternative, especially for short distance commuting. This paper describes the application of Brushless DC (BLDC) motor technology in an electric vehicle with special operation on regenerative braking. BLDC motors are frequently used for electric vehicle due to its high efficiency & robustness. In an electric vehicle, regenerative breaking helps to conserve energy by charging the battery, thus extending the driving range of the vehicle.


  1. Regenerative braking
  2. BLDC Motor
  3. Electric vehicle



Fig. 1 Equivalent circuit of an inverter driven 3- phase PM BLDC motor


Fig. 2. Drive cycle with maximum vehicle speed of 25 kmph (corresponding motor speed 330 rpm)

Fig. 3. Battery power and current during combination of regenerative braking and mechanical braking.

Fig.4. Acceleration signal, brake signal, vehicle speed and distance travelled.

Fig.5. Comparision of SOC for different braking methods


In this paper, the line back –EMF based regeneration Technique is used. The performance presented in this paper gives better than conventional mechanical braking in two wheeler EVs.Ultra capacitor is used as secondary energy storage, with regards to its remarkable properties, has used to improve the acceleration performance and regenerative braking efficiency. Further, the presented method is the simplest one among the known regenerative methods in terms of the simplicity of the system, ease of implementation. This control system developed higher braking torque than conventional mechanical braking. The proposed control strategy also gives a higher electric regenerative braking efficiency and better control performance. In an electric vehicle, regenerative breaking helps to conserve energy by charging the battery, thus extending the driving range of the vehicle.


[1]Cody J, 2008, “Regenerative Braking Control for a BLDC Motor in Electric Vehicle Applications”, Honours Paper in Bachelor of Engineering degree, University of South Australia, School of Electrical and Information Engineering.

[2] Ehsani, M.; Falahi, M.; Lotfifard, S. Vehicle to grid services: Potential and applications. Energies 2012, 5, 4076–4090.

[3] Falahi, M.; Chou, H.M.; Ehsani, M.; Xie, L.; Butler-Purry, K.L. “Potential power quality benefits of electric vehicles”. IEEE Trans. Sustain. Energy 2013, 4, 1016–1023.

[4]J. Shen, X.J.; Chen, S.; Li, G.; Zhang, Y.; Jiang, X.; Lie, T.T. “Configure methodology of onboard super capacitor array for recycling regenerative braking energy of URT vehicles”. IEEE Trans. Ind. Appl. 2013, 49, 1678–1686.

[5]. Yang, M.-J.; Jhou, H.-L.; Ma, B.-Y.; Shyu, K.-K. “A costeffective method of electric brake with energy regeneration for electric vehicles”. IEEE Trans. Ind. Electron. 2009, 56, 2203– 2212.

Active Power Filter for Harmonic Mitigation of Power Quality Issues in Grid Integrated Photovoltaic Generation System


Single phase supply scheme tied with Photovoltaic arrangement (PV) employed on perturbed & observed (P&O) maximum energy point tracking technique with shunt active power filter allied to a rectifier feed R-L nonlinear load. The traditional Perturbed & Observed technique maximum energy point tracking topology is applied to attained maximum output power from Photovoltaic array(PVA), Proportional Integral conventional controller with phase detector (PD) phase locked loop (PLL) synchronization are executed to produce reference current. It provide at control unit of pulse width modulation topology( PWM) is utilized in inverter to get steady output voltage. Self supported DC bus PWM converter is regulated from PV array. In proposed architecture is minimized total harmonic pollution existing in supply current owing to power electronic load (PEL). Total current harmonic pollution (THDi) is compensated using dynamic filter shunt active power filter (SAPF) and power factor obtain better later than compensation. Hence, reactive power (KVAR) is delivered through system decrease and active power (KW) enhance. The suggested scheme has been implemented by way of MATLAB/SIMULINK 2015(a) environment.


  1. Shunt Active Power Filter (SAPF)
  2. Photovoltaic Array (PVA)
  3. Proportional Integral controller
  4. Pulse width Modulated (PWM) Converter
  5. Maximum Power Point Tracking (P & O) Scheme



Fig.1 Suggested system schematic.


Fig.2. PV array voltage before boosting.

Fig.3. DC link voltage

Fig.4. Power Factor

Fig.5. Source currents before compensation.

Fig.6. SAPF filter current.

Fig.7.Source current after comopensation as after 0.1 sec.

Fig.8. Graphical representation of active power

Fig.9. Graphical representation of reactive power

Fig.10. Source current harmonic spectrum befor compensation with

rectifier non linear diode load.

Fig.11. Source current harmonic graph after SAPF application.


 In this research paper SAPF based on phase detector circuit (PLL) for unit vector generation with traditional PI controller is implemented. This controller regulates DC side voltage, reference current generated by PI conventional controller and positive progression predictor PLL synchronization unit. Hysteresis band current control(HBCC) is employed to produce gate signal for voltage source inverter (VSI). The source current THD is abridged to fewer than 5% that is in accordance IEEE-519 standards for harmonic. Active power is improved by dynamic filtering using SAPF and decrease in reactive power consequently, power factor level is become finer.


[1] M. Singh, V. Khadkikar, A. Chandra, and R. K. Varma,“Grid Interconnection of Renewable Energy Sources at the Distribution Level With Power-Quality Improvement Features” IEEE Transactions on Power Delivery, vol. 26, no. 1, January 2011.

[2] S. Agrawal, Seemant Chorsiya, D.K Palwalia, “Hybrid Energy Management System design with Renewable Energy Sources (Fuel Cells, PV Cells and Wind Energy): A Review”, IJSET, vol. 6, no. 3, pp.174-177, 2018. DOI : 10.5958/2277 1581.2017.00104.8.

[3] M. G. Villalva, J. R. Gazoli and E. R. Filho, “Modeling and circuitbased simulation of photovoltaic arrays”, Brazilian Power Electronics Conference, Bonito-Mato Grosso do Sul, pp. 1244-1254, 2009.

[4] S. Agrawal and D. K. Palwalia, “Analysis of standalone hybrid PVSOFC- battery generation system based on shunt hybrid active power filter for harmonics mitigation.” IEEE Power India International Conference (PIICON) pp. 1-6, 2016.

[5] M. M. Hashempour, M. Savaghebi, J. C. Vasquez and J. M. Guerrero, “A Control Architecture to Coordinate Distributed Generators and Active Power Filters Coexisting in a Microgrid”, IEEE Transactions on Smart Grid, vol. 7, no. 5, pp. 2325-2336, Sept. 2016.

The Study of Single-phase PWM Rectifier Based on PR Control Strategy


Synchronous PI controller is usually used to track current in three-phase PWM rectifier with zero steady-state error which is difficult to achieve in the single-phase system. A novel proportional-resonant (PR) control scheme for single-phase PWM rectifier is proposed in the paper. Compared with traditional PI control and current hystereis control (CHC) methods, the PR control structure is simple and can reduce control time delay Significantly. The simulation results verify the feasibility of the proposed control scheme in the disturbance rejection. In addition, sinusoidal current zero static error control can be achieved without a coordinate transformation and the DC voltage can automatically adjust to changes of grid voltage, load value and frequency which contributes to energy conversion and bidirectional flow of electricity.


  1. Single-phase rectifiers
  2. CHC control
  3. PR-based control



(a) The topological structure

(b) The current control dynamic block diagram

Fig 1. The topological structure and the current control dynamic block diagram of PWM rectifiers.


(a) The value of DC voltage.

(b) The value of AC current.

(c) Comparison between the feedback current and the referent current

Fig.2. The simulation waves based on CHC control scheme.

(a) The value of DC voltage.

(b) The value of grid voltage and AC current

(c) The value of actual voltage and predictive error.

(d) Comparison between the feedback current and the referent current

Fig 3.The simulation waves based on PR control scheme.

(a) Current Hystereis Control(CHC)

(b) Proportional-Resonant (PR) based control.

Fig 4. The AC current spectrum.


From the above conducted studies, one can conclude that PR-based Control strategy for single-phase PWM rectifier presents better steady-state and can successfully achieve accurate regulation with fast dynamic response with minimum harmonic distortions. The simulation results show that sinusoidal current zero static error control can be achieved without a coordinate transformation and the DC voltage could automatically adjust to changes of grid voltage, load value and frequency which contributes to energy conversion and bidirectional flow of electricity. The control algorithm is easy to be realized while the robustness and power quality is improved. The highlight of paper lies in applying PR regulator to the adjustment of sinusoidal AC current zero static error , building the system model of single-phase PWM rectifier in MATLAB/Simulink with CHC and PR control scheme respectively and giving proper comparisons to some degree.


[1] Song H.S, Nam K, Instantaneous Phase-angle Estimation Algorithm Under Unbalanced Voltage-sag Condition, IEEE Proc Generation, Transmission, and Distribution, Vol.147, No.6, 409-415, 2000.

[2] Zmood D.N, Holmes D.G, Stationary Frame Current Regulation of PWM Inverters with Zero Steady-state Error, IEEE Transactions on Power Electronics, Vol.18, No.3, 814-822, 2003.

[3] Yuan X, Merk W, Stemmler H, Stationary-frame Generalized Integrators for Current Control of Active Power Filters with Zero Steady-state Error for Current Harmonics of Concern Under Unbalance and Distorted Operating Conditions, IEEE Trans on Industry Applications, Vol.38, No.2, 523-532, 2002.

[4] ZHAO Qinglin, GUO Xiaoqiang, WU Weiyang, Research on Control Strategy for Single-phase Grid-connected Inverter, Proceedings of the CSEE, 60-64, 2007.

[5] JIANG Jun-feng, LIU Hui-jin, CHEN Yun-ping, A Novel Double Hystersis Current Control Method of Active Power Filter with Voltage Space Vector. Proceedings of the CSEE, Vol.24, No.10, 82-86, 2004.

Sensorless Start-Up Strategy for a 315 kW High-Speed Brushless DC Motor with Small Inductance and Non-ideal Back-EMF


This paper presented a novel sensorless start-up strategy for a 315kW high-speed magnetic suspension brushless DC (BLDC) motor with small inductance and non-ideal back electromotive force (back-EMF). Two key strategies on the sensorless start-up strategy of BLDC motor were presented: (1) small current start-up strategy for the high-speed BLDC motor with small inductance, and (2) self-adaption control strategy to compensate the commutation error for the BLDC motor with non-ideal back-EMF in the start-up stage. A hybrid pulse width modulation (PWM) strategy based on the load torque was proposed to limit the start-up current. An optimal motor start-up curve based on the system parameters was presented, and a self-adaption control strategy was proposed to solve the synchronous switching problem. The effectiveness and feasibility of the proposed method were verified by a series of experiments on the 315 kW-20000 rpm magnetic suspension blower platform.


  1. BLDC motor
  2. Small inductance
  3. Non-ideal back-EMF
  4. Sensorless
  5. Start-up strategy
  6. Self-adaption control strategy



Fig. 1. The block diagram of novel sensorless start-up strategy.


Fig. 2. The comparisons experiment results of sensorless start-up strategy. (a) The start-up stage based on traditional sensorless “three-step” start-up method. (b) The start-up stage based on the sensorless start-up strategy proposed in this paper.

Fig. 3. The phase current and line-to-line voltages in the start-up stage without commutation compensation. (a) The synchronous error angle caused the waveform distortion in the start-up stage. (b) The synchronous error angle caused the motor out of step in the start-up stage.

Fig. 4. The comparisons experiment results of sensorless strategy under heavy load. (a) The start-up stage based on traditional sensorless “three step” start-up strategy. (b) The start-up stage based on the sensorless start-up strategy proposed in this paper

Fig.5. The curves of electromagnetic torque and the motor speed when the load torque changed in the start-up stage. (a) The curves under traditional sensorless start-up strategies. (b) The curves under sensorless start-up strategies proposed in this paper.


This paper analyzed the main factors that influence the sensorless start-up performance of the high-power high-speed BLDC motor with small inductance and non-ideal back-EMF. A reliable start-up strategy was proposed by improving the detection of the initial rotor position, the closed-loop acceleration, and the synchronous switching process. The important conclusions were listed as follows.

(1) The rotor initial position can be positioned by the “two step” detection strategy. The start-up current can be adjusted according to the load torque in real time. Therefore, the method proposed in this paper ensured that the motor can start-up successfully under the load condition.

(2) The speed-up curve in the external-synchronization stage was optimized by analyzing the relationship between the motor speed and the terminal voltage. The rotor rotating time from the stationary position to a specify position was obtained by analyzing the average torque in 1/6 cycle and the rotor inherent characteristic.

(3) The synchronous switching process was improved by estimating the commutation error angle and the free decelerating. The influence of the back-EMF shape was analyzed by Eq. (28) and (29). The problems of high frequency noise and the rotor position error were solved by the free decelerating.


[1] A. Boglietti, C. Gerada, A. Cavagnino, “High-speed electrical machines and drives,” IEEE Trans. Ind. Electron., vol. 61, no. 6, pp. 2943-2945, Jun. 2014.

[2] W. Li, J. Fang, H. Li, J. Tang, “Position sensorless control without phase shifter for high–speed BLDC motors with low inductance and non-ideal back EMF,” IEEE Trans. Power Electron., vol. 31, no. 2, pp. 1354–1366, Feb. 2016.

[3] S. Chen, G. Liu, S. Zheng, “Sensorless control of BLDCM drive for a High-Speed maglev blower using a low pass filter,” IEEE Trans. Power Electron., vol. 32, no. 11, pp. 8845–8856, Nov. 2017.

[4] S. Shinnaka, “New “D-state-observer”-based vector control for sensorless drive of permanent-magnet synchronous motors,” IEEE Trans. Ind. Appl., vol. 41, no. 3, pp. 825–833, Jun. 2005.

[5] G. Liu, C. Cui, K. Wang, B. Han, S. Zheng, “Sensorless control for high–speed brushless DC motor based on the line–to–line back EMF,” IEEE Trans. Power Electron., vol. 31, no. 7, pp. 4669–4683, Jul. 2016.

Sensor-Less Five-Level Packed U-Cell (PUC5) Inverter Operating in Stand-Alone and Grid-Connected Modes


In this paper a new mode of operation has been introduced for Packed U-Cell (PUC) inverter. A sensor-less voltage control based on redundant switching states is designed for the PUC5 inverter which is integrated into switching process. The sensor-less voltage control is in charge of fixing the DC capacitor voltage at half of the DC source value results in generating symmetric five-level voltage waveform at the output with low harmonic distortion. The sensor-less voltage regulator reduces the complexity of the control system which makes the proposed converter appealing for industrial applications. An external current controller has been applied for grid-connected application of the introduced sensor-less PUC5 to inject active and reactive power from inverter to the grid with arbitrary power factor while the PUC auxiliary DC bus is regulated only by sensor-less controller combined with new switching pattern. Experimental results obtained in stand-alone and grid-connected operating modes of proposed PUC5 inverter prove the fast response and good dynamic performance of the designed sensorless voltage control in balancing the DC capacitor voltage at desired level.


  1. Multilevel Inverter
  2. Packed U-Cell
  3. Sensor-Less Voltage Regulator
  4. PUC5
  5. 5-Level Inverter
  6. Power Quality



Fig. 1: PUC inverter topology


Fig. 2: start-up capacitor charging, 5-level voltage generating and FFT Analysis

Fig 3: adding single-phase rectifier (as nonlinear load) paralleled with the RL load to the output of PUC5

Fig. 4: DC source voltage changes and capacitor voltage is tracking the reference value

Fig. 5: switches gate pulses

Fig. 6: grid-connected PUC5 with change in current reference amplitude

Fig. 7: THD, and Crest factor computation of injected grid current

Fig. 8: PUC5 inverter operation at different power factors a) PF = 0.86, _ = 30° b) PF = 0.86, _ = 60°


The PUC5 inverter has been proposed in this paper while the capacitor voltage is balanced without involving any external controller and voltage feedback sensors. The proposed sensor-less voltage controller has been integrated into switching technique to work as open-loop system with reliable results. Moreover, another controller has been designed for the PUC5 inverter to work as unity power factor grid-connected inverter. Low harmonics components in both voltage and current waveforms generated by PUC5, no need to bulky output filters, reliable and good dynamic performance in variable conditions (including change in DC source, load, power amount injected to the grid), requiring no voltage/current sensor in stand-alone mode, low manufacturing costs and miniaturized package due to using less components and etc are interesting advantages of the introduced PUC5 topology which have been proved by experimental results in both stand-alone and grid-connected modes. The presented PUC5 inverter can be a challenging candidate for conventional photovoltaic application inverters.


[1] H. Abu-Rub, M. Malinowski, and K. Al-Haddad, Power electronics for renewable energy systems, transportation and industrial applications: John Wiley & Sons, 2014.

[2] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Ind. Electron. Mag., vol. 2, no. 2, pp. 28-39, 2008.

[3] C. Cecati, F. Ciancetta, and P. Siano, “A multilevel inverter for photovoltaic systems with fuzzy logic control,” IEEE Trans. Ind. Electron., vol. 57, no. 12, pp. 4115-4125, 2010.

[4] M. Seyedmahmoudian, S. Mekhilef, R. Rahmani, R. Yusof, and E. T. Renani, “Analytical modeling of partially shaded photovoltaic systems,” Energies, vol. 6, no. 1, pp. 128-144, 2013.

[5] H. Mortazavi, H. Mehrjerdi, M. Saad, S. Lefebvre, D. Asber, and L. Lenoir, “A Monitoring Technique for Reversed Power Flow Detection With High PV Penetration Level,” IEEE Trans. Smart Grid, vol. 6, no. 5, pp. 2221-2232, 2015.

Sensorless BLDC Motor Commutation Point Detection and Phase Deviation Correction Method


 Phase-to-neutral voltage or neutral-to-virtual neutral voltage zero-crossing points (ZCPs) detection method is usually used for sensorless BLDC motor commutation control. Unfortunately, neither of them can be realized in lower speed range. In this paper, a simple commutation point detection method is proposed based on detecting inactive phase terminal to dc-link midpoint voltage. It eliminates the requirement of neutral wire or virtual neutral voltage and provides an amplified version of back electromotive force (EMF) at the ZCPs which makes the lower speed range detection possible. As the speed increasing, commutation point error is enlarged due to the low pass filter (LPF) et al. Utilizing the symmetry of the terminal to midpoint voltage the phase error can be corrected. However, due to the nonlinear relationship between the detected voltage difference and phase error, it is difficult to regulate the error fast and robustly. Therefore, a novel phase regulator based on fuzzy neural network (FNN) is proposed in this paper with simple structure and learning ability. The validity of the proposed ZCPs detection method and commutation instant shift correction method are verified through experimental results.


  1. Brushless dc (BLDC) motor
  2. Commutation signal
  3. Fuzzy neural network
  4. Sensorless motor
  5. Zero-crossing points (ZCPs) detection



Fig. 1Buck converter based BLDC motor drive system topology


Fig. 2 Three kinds of ZCPs detection methods comparison.

Fig. 3 Convergence speed comparison between PI controller and FNN-based controller at 18000rpm.

Fig. 4 Performance comparisons between PI controller and FNN-based controller during 10000rpm~13000rpm.

Fig. 5 Performance comparisons between PI controller and FNN-based controller during 3000rpm~7000rpm.

Fig. 6 Performance comparisons between direct calculation method and FNN-based controller at 5000rpm.

Fig. 7 Speed range tests for the terminal to virtual neutral voltage-based method and the proposed method.

Fig. 8 Transient performances of the proposed method.


In this paper, a novel commutation point detection method is proposed. It is realized based on detecting the ZCPs of inactive phase terminal to dc-link midpoint voltage. Since it provides an amplified version of back-EMF at the ZCPs, this method makes the sensorless driving in lower speed range possible. Then, the relationship between the phase shift and the sampled terminal to midpoint voltage difference is derived, and its influencing factors are analyzed in detail. Based on this relationship, a robust and fast commutation point phase deviation correction method is proposed based on the FNN controller. The experiments show that the proposed controller is effective in both steady-speed control and variable-speed control. It exhibits fast convergence behavior in the whole speed range compared with the PI controller, and it presents strong robustness compared with the direct calculation method even if motor parameters have large fluctuations.


[1] W. Jiang, H. Huang, J. Wang, et al, “Commutation Analysis of Brushless DC Motor and Reducing Commutation Torque Ripple in the Two-Phase Stationary Frame,” IEEE Trans. Power Electron., vol. 32, no. 6, pp. 4675–4682, Jun. 2017.

[2] W. Chen, Y. Liu, X. Li, et al, “A Novel Method of Reducing Commutation Torque Ripple for Brushless DC Motor Based on Cuk Converter,” IEEE Trans. Power Electron., vol. 32, no. 7, pp. 5497–5508, Jul. 2017.

[3] S.Zheng, B.Han, L.Guo. Composite Hierarchical Antidisturbance Control for Magnetic Bearing System Subject to Multiple External Disturbances [J]. IEEE Transactions on Industrial Electronics, 2014, 61(12): 7004-7012.

[4] S.Zheng, H.Li, B.Han, J.Yang. Power Consumption Reduction for Magnetic Bearing Systems during Torque Output of Control Moment Gyros [J]. IEEE Transactions on Power Electronics, 2017, 32(7): 5752-5759.

[5] T. Chun, Q. Tran, H. Lee, “Sensorless Control of BLDC Motor Drive for an Automotive Fuel Pump Using a Hysteresis Comparator,” IEEE Trans. Power Electron., vol. 29, no. 3, pp. 1382–1391, Mar. 2014.

Novel Single Stage Power Factor Corrected LED Driver Topology for Space Constrained Applications of Aircraft Exterior Lighting System


This paper proposes a novel converter topology based on a single stage LED driver with Power Factor Correction (PFC) which is optimized for weight, volume and cost, for space constrained environments such as Aerospace exterior lighting product. The proposed topology utilizes a single switch to harmonize the input current as well as control the intensity of lighting system. A typical Power Factor Pre-regulator (PFP) uses a bulk energy storage capacitor, which is subjected to wear out at higher altitudes due to low pressure conditions and freezes at negative temperatures, resulting in poor reliability converter for Aerospace applications. Unlike a regular Power Factor Pre-regulator (PFP), the proposed topology avoids the use of bulk energy storage capacitor which results in a fast transient response with enhanced reliability, reduced board real estate and weight. The proposed LED driver topology can control the LED current with both Buck and Boost mode of control, making it a good choice for applications with wide input voltage variation. A 110 W prototype based on proposed converter was built to verify the operation of proposed topology. The experimental results are in line with the predicted performance. The proposed converter is able to achieve a power factor of 0.988 with an input current THD of < 10%.



Figure 1. Conventional two stage active PFC based LED driver topology


Figure 2. Measured waveforms at 90V AC input (a) Input Voltage (Red) (b) Input current (Blue) (c) Average Voltage drop across LED current sense resistor (green) (Equivalent to LED average current as the sense resistor value is 1ohm.

Figure 3. Measured Linear FFT of input current

Figure 4. Start-up transient at 90V AC input (a) Input Voltage (Red) (b) Input current (Blue) (c)  Average Voltage drop across LED current sense  resistor (Green)(Equivalent to LED average current  as the sense resistor value is 1ohm.

Figure 5. Current profiles through various power circuit components (a) LED Current (Green) (b) Current through MOSFET M1 (Red) (c) Current through inductor L2 (Blue) (d) Current through Inductor L1 (Purple)

Figure 6. Current profiles through various power circuit components (a) LED Current (Green) (b) Current through MOSFET M1 (Red) (c) Current through inductor L2 (Blue) (d) Current through Inductor L1 (Purple)

Figure 7. Measured waveforms at 132V AC input (a) Input Voltage (Light Blue) (b) Input current (Blue) (c) Average Voltage drop across LED current sense resistor (Red).


This paper presents a novel LED driver topology, capable of input power factor correction, for space constrained applications, such as Aerospace exterior lighting product line. Due to the compact design of the proposed LED driver topology, it can be of great advantage for an integrated power supply solution for Aerospace exterior lighting product offerings. The proposed LED driver topology can control the LED current with both Buck and Boost mode of control, making it a good choice for applications with wide input voltage variation. The proposed LED driver topology has been verified by mathematical analysis, circuit simulation and performance has been demonstrated experimentally as well. The proposed LED driver topology promises an appreciable amount of savings in term of real estate, power loss, and heat sink requirements while enhancing the power density of the converter and its reliability. Typically, it’s the bulk output capacitor that wears out with pressure variation (wear out phenomenon accelerates at altitudes more than 8000m due to the reduced pressures); which can be avoided with the proposed topology. Depending upon the load (number of LEDs) and input voltage; in order to protect LEDs, a reverse blocking diode may be required during the Buck operation. For Boost application, reverse blocking diode will not be required even with today’s technology. Authors have been granted a U.S. Patent 9363291 [8] against the proposed novel LED driver topology.


[1] L. H. Dixon, “High Power Factor Preregulators for Off- Line Power Supplies,” Unitrode Power Supply Design Seminar Manual SEM600, 1988. (Republished in subsequent Manuals)

[2] Spiazzi, G., and Mattavelli, P. (1994) “Design criteria for power factor preregulators based on SEPIC and Cuk converters in continuous conduction mode,” IEEE IAS Conference Record, 1994, 1084-1089.

[3] Z. Ye, F. Greenfeld, and Z. Liang, “Single-stage offline SEPIC converter with power factor correction to drive high brightness LEDs,” in Proc. IEEE Appl. Power Electron. Conf., 2009, pp. 546–553.

[4] C.Zhou and M.Jovanovic, “Design Trade-offs in Continuous Current-Mode Controlled Boost Power-Factor Correction Circuits”, HFPC Cod. Proc., 1992, pp. 209-220

[5] L. H. Dixon, “Average Current Mode Control of Switching Power Supplies,” Unitrode Power Supply Design Seminar Manual SEM700, 1990