A Seven Level Modified Cascaded H Bridge Inverter


This paper presents a new single phase seven level inverter topology is suggested to reduced number of switches for seven level cascaded multilevel inverter. A multilevel inverter is used in power conversion methodology for, high power application and high voltage in today’s power grid, transportation systems, transmission system and industrial motor drives. This paper focus on modelling and simulation of single-phase inverter as a frequency changer by PWM. The model is implemented using MATLAB/Simulink software. The operation procedure of the inverter is detailed and is demonstrated with Simulink. Hence suggested model provides improved performance or more effective with less switch loss and total harmonic distortion. The simulation is carried out in MATLAB2018b for modified cascaded seven level H bridge inverter also shown its simulation.


  1. Inverter
  2. Multilevel inverter
  3. Cascaded H-bridge
  4. Modified cascaded H-bridge



Figure 1: Proposed System


Figure 2: Seven Level Simulation output

Figure 3: PWW signal on each MOSFET


In this paper, a cascaded H-bridge ML topology was simulated and it is concluded that for producing the same 7- level output voltage, the proposed ML inverter requires only 6 switches whereas the conventional type requires 8 switches. This difference will be larger if the number of output voltage level is further increased. Therefore, the proposed cascaded H-bridge ML topology can eliminate roughly half the number of switches, their gate drivers compared with the existing cascaded MLI counterparts. Despite a higher total VA rating of the switches, the cascaded ML inverters are cost less due to the savings from the eliminated gate drivers. The proposed concept is validated through simulation studies.


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