A novel multilevel inverter based on a three-level half bridge is proposed for the DC/AC applications. For each power cell, only one DC power source is needed and five-level output AC voltage is realized. The inverter consists of two parts, the three-level half bridge, and the voltage vector selector, and each part consists of the four MOSFETs. Both positive and negative voltage levels are generated at the output, thus, no extra H bridges are needed. The switches of the three-level half bridge are connected in series, and the output voltages are (Vo, Vo/2, and 0). The voltage vector selector is used to output minus voltages (Vo and Vo/2) by different conducting states. With complementary working models, the voltages of the two input capacitors are balanced. Besides, the power cell is able to be cascaded for more voltage levels and for higher power purpose. The control algorithm and two output strategies adopted in the proposed inverter are introduced, and the effectiveness is verified by simulation and experimental results.
- Bridge circuits
- DC-AC power converters
- Modular multilevel converters
- Pulse width modulation converters
- Voltage control
Figure 1. The proposed hybrid ZVS bidirectional DC/AC inverter topology.
EXPECTED SIMULATION RESULTS:
Figure 2. Waveforms with LFF strategy.
Figure 3. Waveforms with HFSPWM strategy.
Figure 4. Voltages of input capacitors C1 and C2.
Figure 5. Output waveforms of 2-level cascaded topologies.
A novel multilevel inverter based on a three-level half bridge is proposed for DC/AC applications in this paper. For each power cell, only one DC power source is needed and 5-level output AC voltage is realized. Both positive and negative voltage levels are generated at the output, thus no extra H bridges are needed. The non-isolated topology (transformerless) eliminates magnetic losses. The operating principle and the working stages of the proposed inverter are introduced, while the two output strategies are discussed in detail. Besides, voltage balance strategy is adopted to balance the bus capacitor voltages, and stage optimization method is applied to further reduce the switching losses. Finally, a simulation is carried out to verify the two output strategies, voltage balance strategy and the cascaded ability, and a laboratorial experiment is carried out to test the THD losses and the total efficiency.
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