A Modified Seven Level Cascaded H Bridge Inverter


Presently Multilevel inverters are extensively used for high-voltage applications and their execution is exceptionally better to that of regular two-level inverters due to minimized harmonic distortion, lower electromagnetic interference and larger DC link voltages. Nevertheless certain shortcomings are faced such as adding in number of components and voltage balancing problem. In order to overcome these, a seven-level hybrid inverter has been proposed. This topology requires a lesser number of power switches which results in the decrease of multifaceted nature, add up to cost and weight of the inverter. Finally this can be able to generate near sinusoidal voltages and approximately fundamental frequency switching. The simulation and the experimental results of a modified cascaded seven level H bridge inverter with and without LC filter are presented for validation.


  1. Cascaded H-bridge inverter (CHBI)
  2. Seven level hybrid inverter
  3. Asymmetrical DC sources
  4. Total harmonic distortion (THD)
  5. Pulse Width modulation (PWM)
  6. Multi-level Inverter (MLI)
  7. Real time Interface (RTI)



Fig.1.Proposed topology of modified cascaded H bridge inverter


Fig.2. MATLAB/ SIMULINK results of existing cascaded H-bridge inverter model

Fig.3. Output voltage and its THD of modified seven-level cascaded H-bridge inverter without filter

Fig.4.output voltage and its THD of modified seven level cascaded H bridge inverter with LC filter


A modified cascaded seven level H-bridge inverter was fabricated which has the benefit of reduced THD, portability, and cost has compared to normal cascaded H-bridge inverter. Since the topology requires minimum switches, and low-cost real time interfacing device (Arduino) compared DSP, DSPACE, FPGA, etc., the overall expenditure for fabrication reduces. This paper envisages the working of proposed structure. An LC filter is introduced which helps in getting nearer to sinusoidal waveform. The concepts which are projected are verified through simulation and experimental results. Satisfactory results are obtained and are tabulated in Table 2.


[1] E. Babaei and S.Hosseini, “Charge balance control methods for asymmetrical cascade multilevel converters”. In Proc. ICEMS, Seoul, Korea, 2007, pp, 74-79.

[2] K. Wang, Y. Li, Z. Zheng, and L. Xu, “Voltage balancing and fluctuation suppression methods of floating capacitors in a new modular multilevel converter,” IEEE Trans. Ind. Electron., vol. 60, no. 5, pp. 1943–1954,May 2013

[3] J. Napoles, A. J. Watson, and J. J. Padilla, “Selective harmonic mitigation technique for cascaded H-bridge converter with nonequal dc link voltages,” IEEE Trans. Ind. Electron., vol. 60, no. 5, pp. 1963–1971, May 2013.

[4] N. Farokhnia, S. H. Fathi, N. Yousefpoor, and M. K. Bakhshizadeh, “Minimisation of total harmonic distortion in a cascaded multilevel inverter by regulating of voltages dc sources,” IET Power Electron., vol. 5, no. 1, pp. 106–114, Jan. 2012.

[5] S. Mekhilef, M. N. Abdul Kadir, and Z. Salam, “Digital control of three phase three-stage hybrid multilevel inverter,” IEEE Trans. Ind. Informat., vol. 9, no. 2, pp. 719–727, May 2013.

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