An Enhanced Voltage Sag Compensation Scheme for Dynamic Voltage Restorer

ABSTRACT:  

This paper manages enhancing the voltage nature of touchy burdens from voltage droops utilizing dynamic voltage restorer (DVR). The higher dynamic power necessity related with voltage stage hop remuneration has caused a generous ascent in size and cost of dc connect vitality stockpiling arrangement of DVR. The current control procedures either moderate the stage bounce or enhance the usage of dc interface vitality by (I) diminishing the abundancy of infused voltage, or (ii) advancing the dc transport vitality bolster. In this paper, an upgraded list pay procedure is suggested that mitigates the stage bounce in the heap voltage while enhancing the general droop remuneration time. A scientific examination demonstrates that the proposed strategy essentially builds the DVR list bolster time (over half) contrasted and the current stage bounce pay strategies. This upgrade can likewise be viewed as a significant decrease in dc interface capacitor measure for new establishment. The execution of proposed technique is assessed utilizing recreation contemplate lastly, confirmed tentatively on a scaled lab model.

 

CIRCUIT DIAGRAM:

 

 Fig. 1 Basic DVR based system configuration.

 EXPECTED SIMULATION RESULTS:

 

Fig. 2. Simulation results for the proposed sag compensation method for 50% sag depth. (a) PCC voltage, (b) load voltage, (c) DVR voltage, (d) DVR active and reactive power, and (e) dc link voltage.

Fig. 3. Simulation results for the proposed sag compensation method for 23% sag depth. (a) PCC voltage, (b) load voltage, (c) DVR voltage, (d) DVR active and reactive power, and (e) dc link voltage.

 CONCLUSION:

In this paper an upgraded hang remuneration conspire is proposed for capacitor bolstered DVR. The proposed procedure enhances the voltage nature of touchy loads by ensuring them against the lattice voltage droops including the stage bounce. It likewise builds remuneration time by working in least dynamic power mode through a controlled change once the stage bounce is redressed. To show the viability of the proposed technique a scientific correlation is completed with the current stage bounce pay plans. It is demonstrated that pay time can be reached out from 10 to 25 cycles (considering presag infusion as the reference strategy) for the planned furthest reaches of half droop profundity with 450 stage bounce. Further expansion in remuneration time can be accomplished for middle of the road droop profundities. This all-inclusive pay time can be viewed as extensive decrease in dc connect capacitor estimate (for the examined case over half) for the new establishment. The viability of the proposed strategy is assessed through broad recreations in MATLAB/Simulink and approved on a scaled lab model tentatively. The trial results exhibit the plausibility of the proposed stage hop remuneration strategy for viable applications.

 

Analysis of Discrete & Space Vector PWM Controlled Hybrid Active Filters For Power Quality Enhancement

ABSTRACT:

It is known from the fact that Harmonic Distortion is one of the main power quality problems frequently encountered by the utilities. The harmonic problems in the power supply are caused by the non-linear characteristic based loads. The presence of harmonics leads to transformer heating, electromagnetic interference and solid state device mal-functioning. Hence keeping in view of the above concern, research has been carried out to mitigate harmonics. This paper presents an analysis and control methods for hybrid active power filter using Discrete Pulse Width Modulation and Space Vector Pulse Width Modulation (SVPWM) for Power Conditioning in distribution systems. The Discrete PWM has the function of voltage stability, and harmonic suppression. The reference current can be calculated by‘d-q’ transformation. In SVPWM technique, the Active Power Filter (APF) reference voltage vector is generated instead of the reference current, and the desired APF output voltage is generated by SVPWM. The THD will be decreased significantly by SVPWM technique than the Discrete PWM technique based Hybrid filters. Simulations are carried out for the two approaches by using MATLAB, it is observed that the %THD has been improved from 1.79 to 1.61 by the SVPWM technique.

KEYWORDS:

  1. Discrete PWM Technique
  2. Hybrid Active Power Filter
  3. Reference Voltage Vector
  4. Space Vector Pulse Width Modulation (SVPWM)
  5. Total Harmonic Distortion (THD)
  6. Voltage Source Inverter (VSI)

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Figure 1. Configuration of an APF using SVPWM

EXPECTED SIMULATION RESULTS:

Figure 2. Source current waveform with hybrid filter

Figure 3. FFT analysis of source current with hybrid filter

Figure 4. Simulation results of balanced linear load

(a) The phase-A supply voltage and load current waveforms

(b) The phase-A supply voltage and supply current waveforms

Figure 5. Simulation results of unbalanced linear load

(a) Three-phase load current waveforms

(b) Three-phase supply current waveforms

Figure 6. Simulation results of non-linear load

(a) The three-phase source voltage waveforms

(b) The three-phase load current waveforms

(c) The three-phase source current waveforms

Figure 7. Harmonic spectrum of non-linear load

(a) The phase-A load current harmonic spectrum

(b) The phase-A source current harmonic spectrum

 CONCLUSION:

In this paper, a control methodology for the APF using Discrete PWM and SVPWM is proposed.These methods require a few sensors, simple in algorithm and are able to compensate harmonics and unbalanced loads. The performance of APF with these methods is done in MATLAB/Simulink. The algorithm will be able to reduce the complexity of the control circuitry. The harmonic spectrum under non-linear load conditions shows that reduction of harmonics is better. Under unbalanced linear load, the magnitude of three-phase source currents are made equal and also with balanced linear load the voltage and current are made in phase with each other. The simulation study of two level inverter is carried out using SVPWM because of its better utilization of DC bus voltage more efficiently and generates less harmonic distortion in three-phase voltage source inverter. This SVPWM control methodology can be used with series APF to compensate power quality distortions. From the simulated results of the filtering techniques, it is observed that Total Harmonic Distortion is reduced to an extent by the SVPWM Hybrid filter when compared to the Discrete PWM filtering technique i.e. from 1.78% to 1.61%.

REFERENCES:

[1] EI-Habrouk. M, Darwish. M. K, Mehta. P, “Active Power Filters-A Rreview,” Proc.IEE-Elec. Power Applicat., Vol. 147, no. 5, Sept. 2000, pp. 403-413.

[2] Akagi, H., “New Trends in Active Filters for Power Conditioning,” IEEE Trans. on Industry applications,Vol. 32, No. 6, Nov-Dec, 1996, pp. 1312-1322.

[3] Singh.B, Al-Haddad.K, Chandra.A, “Review of Active Filters for Power Quality Improvement,” IEEE Trans. Ind. Electron., Vol. 46, No. 5, Oct, 1999, pp. 960-971.

[4] Ozdemir.E, Murat Kale, Sule Ozdemir, “Active Power Filters for Power Compensation Under Non-Ideal Mains Voltages,” IEEE Trans. on Industry applications, Vol.12, 20-24 Aug, 2003, pp.112-118.

A Voltage Regulator for Power Quality Improvement in Low-Voltage Distribution Grids

ABSTRACT:

This paper presents a voltage-controlled DSTATCOM-based voltage regulator for low voltage distribution grids. The voltage regulator is designed to temporarily meet the grid code, postponing unplanned investments while a definitive solution could be planned to solve regulation issues. The power stage is composed of a three-phase four-wire Voltage Source Inverter (VSI) and a second order low-pass filter. The control strategy has three output voltage loops with active damping and two dc bus voltage loops. In addition, two loops are included to the proposed control strategy: the concept of Minimum Power Point Tracking (mPPT) and the frequency loop. The mPPT allows the voltage regulator to operate at the Minimum Power Point (mPP), avoiding the circulation of unnecessary reactive compensation. The frequency loop allows the voltage regulator to be independent of the grid voltage information, especially the grid angle, using only the information available at the Point of Common Coupling (PCC). Experimental results show the regulation capacity, the features of the mPPT algorithm for linear and nonlinear loads and the frequency stability.

KEYWORDS:

  1. DSTATCOM, Frequency Compensation
  2. Minimum Power Point Tracker
  3. Power Quality
  4. Static VAR Compensators
  5. Voltage Control
  6. Voltage Regulation

 SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Low voltage distribution grid under analysis with the voltage regulator

EXPECTED SIMULATION RESULTS:

Fig. 2. Dc bus voltages during the DSTATCOM initialization

Fig. 3. PCC voltages without compensation for linear loads

Fig. 4. PCC voltages with compensation for linear loads

Fig. 5. Voltage regulator currents for linear loads

Fig. 6. Grid, load and voltage regulator currents for linear loads

Fig. 7. PCC voltages without compensation for nonlinear loads

Fig. 8. PCC voltages with compensation for nonlinear loads

Fig. 9. Voltage regulator currents for nonlinear loads

Fig. 10. Grid, load and voltage regulator currents for nonlinear loads

Fig. 11. PCC rms value with linear loads

Fig. 12. Processed apparent power with linear loads

Fig. 13. Voltage regulator currents with mPPT enabled for linear loads

Fig. 14. PCC rms value with nonlinear loads

Fig. 15. Processed apparent power with nonlinear loads

Fig. 16. Voltage regulator currents with mPPT enabled for nonlinear loads

Fig. 17. Total dc bus voltage, PCC voltage, grid voltage and voltage regulator current waveforms of a-phase with mPPT enabled with grid swell

Fig. 18. (a) Total dc bus voltage, PCC voltage, grid voltage and voltage regulator current waveforms of a-phase and (b) detail of total dc bus voltage performance with mPPT enabled with grid sag

CONCLUSION:

This paper presents a three phase DSTATCOM as a voltage regulator and its control strategy, composed of the conventional loops, output voltage and dc bus regulation loops, including the voltage amplitude and the frequency loops. Experimental results demonstrate the voltage regulation capability, supplying three balanced voltages at the PCC, even under nonlinear loads.

The proposed amplitude loop was able to reduce the voltage regulator processed apparent power about 51 % with nonlinear load and even more with linear load (80%). The mPPT algorithm tracked the minimum power point within the allowable voltage range when reactive power compensation is not necessary. With grid voltage sag and swell, the amplitude loop meets the grid code. The mPPT can also be implemented in current-controlled DSTATCOMs, achieving similar results. The frequency loop kept the compensation angle within the analog limits, increasing the autonomy of the voltage regulator, and the dc bus voltage regulated at nominal value, thus minimizing the dc bus voltage steady state error. Simultaneous operation of the mPPT and the frequency loop was verified. The proposed voltage regulator is a shunt connected solution, which is tied to low voltage distribution grids without any power interruption to the loads, without any grid voltage and impedance information, and provides balanced and low-THD voltages to the customers.

REFERENCES:

[1] D. O. Koval and C. Carter, “Power quality characteristics of computer loads,” IEEE Trans. on Industry Applications, vol. 33, no. 3, pp. 613- 621, May/June1997.

[2] Abraham I. Pressman, Keith Billings and Taylor Morey, “Switching Power Supply Design,” 3rd ed., McGraw Hill, New York, 2009.

[3] B. Singh, B.N. Singh, A. Chandra, K. Al-Haddad, A. Pandey and D.P. Kothari, “A review of single-phase improved power quality AC-DC converters” IEEE Trans. on Industrial Electronics, vol.50, no.5, pp.962- 981, Oct. 2003.

[4] K. Mino, H. Matsumoto, Y. Nemoto, S. Fujita, D. Kawasaki, Ryuji Yamada, and N. Tawada, “A front-end converter with high reliability and high efficiency,” in IEEE Conf. on Energy Conversion Congress and Exposition (ECCE),2010, pp. 3216-3223.

[5] Jih-Sheng Lai, D. Hurst and T. Key, Switch-mode supply power factor improvement via harmonic elimination methods,” in 6th Annual IEEE Proc. on Applied Power Electronics Conference and Exposition, APEC’91, 1991, pp. 415-422.