Control of Induction Motor Drive using Space Vector PWM


In this paper speed of acceptance engine is controlled, supply from three stage connect transformer because the variety in information Voltage or recurrence in turn both changes the speed of an taking in engine. Variable voltage and recurrence for Adjustable Speed Drives (AS D) is constantly acquires from a three-stage Voltage Source Invert er (V SI) also P WM strategies controls the Voltage and recurrence of transform er

So which is an imperative viewpoint in the use of AS D s. A number of P WM techniques are there to obtain variable voltage and frequency supply such as P WM, SP WM, S VP WM and among the various modulation strategies, SVPWM is one of the most efficient techniques as it has better performance and output voltage is similar to sinusoidal. SVPWM the modulation index in linear region will also be high when compared to other.


 Figure 1: AS D Block Diagram


 Figure 2: SP WM Pulses

Figure 3: Invert er o/p line voltages

Figure 4: Motor Speed and Electromagnetic torque.

Figure 5: SVPWM output gate pulses

                  Figure 6:Open Loop Drive Speed response with TL=0

Figure 7: Open Loop Drive Speed response with different TL

Figure 8: Sinusoidal PWM based open loop drive Load Current T H D


MAT LAB/Sim u link is used to carryout the simulation of “Control of Induction Motor Drive Using Space Vector P WM” for open loop as well as closed control by which the appropriate output results are obtained.The variation of speed of Induction Motor is observed by varying the load torque in open loop control and the table gives the results. Also observed that for the change in input speed commands the motor speed is settled down to its final value within 0.1 sec in closed loop model.


[1] Ab d e l fat ah K o l l i, Student Member, IEEE, Olivier Be t ho u x, Member, IEEE, A l e x a n d re D e Be r n a  r d in i s, Member, IEEE, Eric Lab our e, and G e r a rd Co q u e r y “Space-Vector P WM Control Synthesis for an H-Bridge Drive in Electric Vehicles” IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 62, NO. 6, JULY 2013. pp. 2241-2252.

[2]Mr. Sand e e p N Pan ch a l, Mr. Vi s h a l S She t h, Mr. A k s hay A P and ya “Simulation Analysis of S V P WM Invert er Fed Induction Motor Drives” International Journal of Emerging Trends in Electrical and Electronics (IJET E  E) Vol. 2, Issue. 4, April-2013. pp. 18-22 .

[3]H a o ran S hi, Wei X  u, Chen  g h u a F u and Y a o Yang. “Research on Three phase Voltage Type P  WM Rectifier System Based on S V P WM Control” Research Journal of Applied Sciences, Engineering and Technology 5(12): 3364-3371, 2013. pp. 3364-3371.

An Enhanced Voltage Sag Compensation Scheme for Dynamic Voltage Restorer


This paper deals with improving the voltage quality of sensitive loads from voltage sags using dynamic voltage restorer (DVR). The higher active power requirement associated with voltage phase jump compensation has caused a substantial rise in size and cost of dc link energy storage system of DVR. The existing control strategies either mitigate the phase jump or improve the utilization of dc link energy by (i) reducing the amplitude of injected voltage, or (ii) optimizing the dc bus energy support.


this paper, an enhanced sag compensation strategy is proposed that mitigates the phase jump in the load voltage while improving the overall sag compensation time. An analytical study shows that the proposed method significantly increases the DVR sag support time (more than 50%) compared with the existing phase jump compensation methods. This enhancement can also be seen as a considerable reduction in dc link capacitor size for new installation. The performance of proposed method is evaluated using simulation study and finally, verified experimentally on a scaled lab prototype.



 Fig. 1 Basic DVR based system configuration.



Fig. 2. Simulation results for the proposed sag compensation method for 50% sag depth. (a) PC C voltage, (b) load voltage, (c) DVR voltage, (d) DVR active and reactive power, and (e) dc link voltage.

Fig. 3. Simulation results for the proposed sag compensation method for 23% sag depth. (a) PC C voltage, (b) load voltage, (c) DVR voltage, (d) DVR active and reactive power, and (e) dc link voltage.


This paper proposed an enhanced sag compensation scheme for capacitor supported DVR. The proposed strategy improves the voltage quality of sensitive loads by protecting them against the grid voltage sags involving the phase jump. It also increases compensation time by operating in minimum active power mode through a controlled transition once the phase jump is compensated. To illustrate the effectiveness of the proposed method an analytical comparison is carried out with the existing phase jump compensation schemes. It is shown that compensation time can be extended from 10 to 25 cycles (considering pr e sag injection as the reference method) for the designed limit of 50% sag depth with 450 phase jump. Further extension in compensation time can be achieved for intermediate sag depths.


extended compensation time is seen as considerable reduction in dc link capacitor size (for the studied case more than 50%) for the new installation. MAT LAB/Sim u link software evaluated the effectiveness of the proposed method through extensive simulations and validated on a scaled lab prototype experimentally. The experimental results demonstrate the feasibility of the proposed phase jump compensation method for practical applications.


[1] J.A. Martinez and J.M. Ar n ed o, “Voltage sag studies in distribution
networks- part I: System modeling,” IEEE Trans. Power Del., vol.
21,no. 3, pp. 338–345, Jul. 2006.
[2] J.G. Nielsen, F. Bl a ab j e r g and N. Mo h  an, “Control strategies for
dynamic voltage restorer, compensating voltage sags with phase jump,”
in Proc. IEEE AP EC, 2001, pp. 1267–1273.
[3] J.D. Li, S.S. Choi, and D.M. Vi l a t h g a m u w a, “Impact of voltage phase
jump on loads and its mitigation,” in Proc. 4th Int. Power Electron.
Motion Control Conf., Xian, China, Aug. 14–16, 2004, vol. 3, pp. 1762–

Analysis of Discrete & Space Vector PWM Controlled Hybrid Active Filters For Power Quality Enhancement


It is known from the fact that Harmonic Distortion is one of the main power quality problems frequently encountered by the utilities. The harmonic problems in the power supply are caused by the non-linear characteristic based loads. The presence of harmonics leads to transformer heating, electromagnetic interference and solid state device mal-functioning. Hence keeping in view of the above concern, research has been carried out to mitigate harmonics. This paper presents an analysis and control methods for hybrid active power filter using Discrete Pulse Width Modulation and Space Vector Pulse Width Modulation (SVPWM) for Power Conditioning in distribution systems. The Discrete PWM has the function of voltage stability, and harmonic suppression. The reference current can be calculated by‘d-q’ transformation. In SVPWM technique, the Active Power Filter (APF) reference voltage vector is generated instead of the reference current, and the desired APF output voltage is generated by SVPWM. The THD will be decreased significantly by SVPWM technique than the Discrete PWM technique based Hybrid filters. Simulations are carried out for the two approaches by using MATLAB, it is observed that the %THD has been improved from 1.79 to 1.61 by the SVPWM technique.


  1. Discrete PWM Technique
  2. Hybrid Active Power Filter
  3. Reference Voltage Vector
  4. Space Vector Pulse Width Modulation (SVPWM)
  5. Total Harmonic Distortion (THD)
  6. Voltage Source Inverter (VSI)



Figure 1. Configuration of an APF using SVPWM


Figure 2. Source current waveform with hybrid filter

Figure 3. FFT analysis of source current with hybrid filter

Figure 4. Simulation results of balanced linear load

(a) The phase-A supply voltage and load current waveforms

(b) The phase-A supply voltage and supply current waveforms

Figure 5. Simulation results of unbalanced linear load

(a) Three-phase load current waveforms

(b) Three-phase supply current waveforms

Figure 6. Simulation results of non-linear load

(a) The three-phase source voltage waveforms

(b) The three-phase load current waveforms

(c) The three-phase source current waveforms

Figure 7. Harmonic spectrum of non-linear load

(a) The phase-A load current harmonic spectrum

(b) The phase-A source current harmonic spectrum


In this paper, a control methodology for the APF using Discrete PWM and SVPWM is proposed.These methods require a few sensors, simple in algorithm and are able to compensate harmonics and unbalanced loads. The performance of APF with these methods is done in MATLAB/Simulink. The algorithm will be able to reduce the complexity of the control circuitry. The harmonic spectrum under non-linear load conditions shows that reduction of harmonics is better. Under unbalanced linear load, the magnitude of three-phase source currents are made equal and also with balanced linear load the voltage and current are made in phase with each other. The simulation study of two level inverter is carried out using SVPWM because of its better utilization of DC bus voltage more efficiently and generates less harmonic distortion in three-phase voltage source inverter. This SVPWM control methodology can be used with series APF to compensate power quality distortions. From the simulated results of the filtering techniques, it is observed that Total Harmonic Distortion is reduced to an extent by the SVPWM Hybrid filter when compared to the Discrete PWM filtering technique i.e. from 1.78% to 1.61%.


[1] EI-Habrouk. M, Darwish. M. K, Mehta. P, “Active Power Filters-A Rreview,” Proc.IEE-Elec. Power Applicat., Vol. 147, no. 5, Sept. 2000, pp. 403-413.

[2] Akagi, H., “New Trends in Active Filters for Power Conditioning,” IEEE Trans. on Industry applications,Vol. 32, No. 6, Nov-Dec, 1996, pp. 1312-1322.

[3] Singh.B, Al-Haddad.K, Chandra.A, “Review of Active Filters for Power Quality Improvement,” IEEE Trans. Ind. Electron., Vol. 46, No. 5, Oct, 1999, pp. 960-971.

[4] Ozdemir.E, Murat Kale, Sule Ozdemir, “Active Power Filters for Power Compensation Under Non-Ideal Mains Voltages,” IEEE Trans. on Industry applications, Vol.12, 20-24 Aug, 2003, pp.112-118.

A Voltage Regulator for Power Quality Improvement in Low-Voltage Distribution Grids


This paper presents a voltage-controlled DSTATCOM-based voltage regulator for low voltage distribution grids. The voltage regulator is designed to temporarily meet the grid code, postponing unplanned investments while a definitive solution could be planned to solve regulation issues. The power stage is composed of a three-phase four-wire Voltage Source Inverter (VSI) and a second order low-pass filter. The control strategy has three output voltage loops with active damping and two dc bus voltage loops. In addition, two loops are included to the proposed control strategy: the concept of Minimum Power Point Tracking (mPPT) and the frequency loop. The mPPT allows the voltage regulator to operate at the Minimum Power Point (mPP), avoiding the circulation of unnecessary reactive compensation. The frequency loop allows the voltage regulator to be independent of the grid voltage information, especially the grid angle, using only the information available at the Point of Common Coupling (PCC). Experimental results show the regulation capacity, the features of the mPPT algorithm for linear and nonlinear loads and the frequency stability.


  1. DSTATCOM, Frequency Compensation
  2. Minimum Power Point Tracker
  3. Power Quality
  4. Static VAR Compensators
  5. Voltage Control
  6. Voltage Regulation



Fig. 1. Low voltage distribution grid under analysis with the voltage regulator


Fig. 2. Dc bus voltages during the DSTATCOM initialization

Fig. 3. PCC voltages without compensation for linear loads

Fig. 4. PCC voltages with compensation for linear loads

Fig. 5. Voltage regulator currents for linear loads

Fig. 6. Grid, load and voltage regulator currents for linear loads

Fig. 7. PCC voltages without compensation for nonlinear loads

Fig. 8. PCC voltages with compensation for nonlinear loads

Fig. 9. Voltage regulator currents for nonlinear loads

Fig. 10. Grid, load and voltage regulator currents for nonlinear loads

Fig. 11. PCC rms value with linear loads

Fig. 12. Processed apparent power with linear loads

Fig. 13. Voltage regulator currents with mPPT enabled for linear loads

Fig. 14. PCC rms value with nonlinear loads

Fig. 15. Processed apparent power with nonlinear loads

Fig. 16. Voltage regulator currents with mPPT enabled for nonlinear loads

Fig. 17. Total dc bus voltage, PCC voltage, grid voltage and voltage regulator current waveforms of a-phase with mPPT enabled with grid swell

Fig. 18. (a) Total dc bus voltage, PCC voltage, grid voltage and voltage regulator current waveforms of a-phase and (b) detail of total dc bus voltage performance with mPPT enabled with grid sag


This paper presents a three phase DSTATCOM as a voltage regulator and its control strategy, composed of the conventional loops, output voltage and dc bus regulation loops, including the voltage amplitude and the frequency loops. Experimental results demonstrate the voltage regulation capability, supplying three balanced voltages at the PCC, even under nonlinear loads.

The proposed amplitude loop was able to reduce the voltage regulator processed apparent power about 51 % with nonlinear load and even more with linear load (80%). The mPPT algorithm tracked the minimum power point within the allowable voltage range when reactive power compensation is not necessary. With grid voltage sag and swell, the amplitude loop meets the grid code. The mPPT can also be implemented in current-controlled DSTATCOMs, achieving similar results. The frequency loop kept the compensation angle within the analog limits, increasing the autonomy of the voltage regulator, and the dc bus voltage regulated at nominal value, thus minimizing the dc bus voltage steady state error. Simultaneous operation of the mPPT and the frequency loop was verified. The proposed voltage regulator is a shunt connected solution, which is tied to low voltage distribution grids without any power interruption to the loads, without any grid voltage and impedance information, and provides balanced and low-THD voltages to the customers.


[1] D. O. Koval and C. Carter, “Power quality characteristics of computer loads,” IEEE Trans. on Industry Applications, vol. 33, no. 3, pp. 613- 621, May/June1997.

[2] Abraham I. Pressman, Keith Billings and Taylor Morey, “Switching Power Supply Design,” 3rd ed., McGraw Hill, New York, 2009.

[3] B. Singh, B.N. Singh, A. Chandra, K. Al-Haddad, A. Pandey and D.P. Kothari, “A review of single-phase improved power quality AC-DC converters” IEEE Trans. on Industrial Electronics, vol.50, no.5, pp.962- 981, Oct. 2003.

[4] K. Mino, H. Matsumoto, Y. Nemoto, S. Fujita, D. Kawasaki, Ryuji Yamada, and N. Tawada, “A front-end converter with high reliability and high efficiency,” in IEEE Conf. on Energy Conversion Congress and Exposition (ECCE),2010, pp. 3216-3223.

[5] Jih-Sheng Lai, D. Hurst and T. Key, Switch-mode supply power factor improvement via harmonic elimination methods,” in 6th Annual IEEE Proc. on Applied Power Electronics Conference and Exposition, APEC’91, 1991, pp. 415-422.