Simulation Analysis of DVR Performance for Voltage Sag Mitigation

ABSTRACT:

Voltage sag is truly one of intensity quality issue and it end up extreme to mechanical clients. Voltage hang can cause miss task to a few touchy electronic types of gear. That issue can be moderating with voltage infusion strategy utilizing custom power gadget, Dynamic Voltage Restorer (DVR). This paper presents displaying and investigation of a DVR with heartbeat width tweak (PWM) based controller utilizing Matlab/Simulink. The execution of the DVR relies upon the effectiveness of the control strategy associated with exchanging the inverter. This paper proposed two control procedures which is PI Controller (PI) and Fuzzy Logic Controller (FL). Complete outcomes are introduced to evaluate the execution of every controller as the best power quality arrangement. Different components that likewise can influence the execution and ability of DVR are displayed also.

 

 BLOCK DIAGRAM:

 Figure1. DVR Modelling using Matlab/Simulink

 EXPECTED SIMULATION RESULTS:

Figure 2. (a) Injection voltage from DVR controlled by PI ; (b) injection voltage controlled by FL

Figure 3. (a) Output voltage at load 1 after injection voltage from DVR controlled by PI; (b) Output voltage at load 1after injection voltage controlled by FL.

Figure 4. (a) Injection voltage from DVR controlled by PI; (b) injection voltage controlled by FL.

Figure 5. (a) Output voltage at load 1 after injection voltage from DVR controlled by PI; (b) Output voltage at load 1after injection voltage controlled by FL.

Figure 6. THD generated when PI controller is applied

Figure 7. THD generated when FL controller is applied.

CONCLUSION:

In this examination, the displaying and reenactment of DVR controlled by PI and FL Controller has been produced utilizing Matlab/Simulink. For both controller, the reenactment result demonstrates that the DVR repays the hang rapidly (70μs) and gives great voltage direction. DVR handles numerous types, adjusted and unequal blame with no troubles and infuses the proper voltage segment to address any blame circumstance happened in the supply voltage to keep the heap voltage adjusted and steady at the ostensible esteem. The two controllers demonstrate an incredible execution and create low THD (<5%). Notwithstanding, it very well may be seen that FL Controller gives better execution with THD produced with just 0.64% while PI created 1.68% THD. In any case, other a few factors that can influence the execution of DVR should be tended to for improvement of the yield voltage. These variables are the vitality stockpiling limit and transformer rating. From the recreation, it unmistakably demonstrates the significance of these two factors and how they influence the execution of DVR. Hence, with regards to usage, it is urgent to think about these elements, so the execution of DVR is enhanced.

Photovoltaic Based Dynamic Voltage Restorer with Energy Conservation Capability using Fuzzy Logic Controller

ABSTRACT:

In this paper, a Photovoltaic based Dynamic Voltage Restorer (PV-DVR) is proposed to deal with profound voltage droops, swells and blackouts on a low voltage single stage private dispersion framework. It can recoup hangs up to 10%, swells up to 190% of its ostensible esteem. Else, it will work as a Uninterruptable Power Supply (UPS) when the utility network neglects to supply. It is likewise intended to diminish the use of utility power, which is produced from atomic and warm power stations. An arrangement infusion transformer is associated in arrangement with the heap while reestablishing voltage droop and swell and it is reconfigured into parallel association utilizing semiconductor switches when it is working in UPS and power saver mode. The utilization of high advance up dc-dc converter with high-voltage gain lessens the size and required power rating of the arrangement infusion transformer. It likewise enhances the dependability of the framework. The Fuzzy Logic (FL)  controller with two data sources keeps up the heap voltage by distinguishing  the voltage varieties through d-q change strategy. Reproduction results have demonstrated the capacity of the proposed DVR  in moderating the voltage list, swell and blackout in a low voltage single stage private appropriation framework.

 

BLOCK DIAGRAM:

 

Fig. 1. Structural block diagram of the proposed system.

 EXPECTED SIMULATION RESULTS:

 

  • (a) Supply Voltage
  • (b) Injected Voltage
  • (c) Load Voltage
  • (d) Load Current

(e) Load voltage THD

Fig. 2. Supply voltage, Injected voltage, Load voltage, Load Current and

Fig. 3. Load Voltage with PI controller

  • (a) PV array output voltage without low power boost converter

(b) PV array output voltage with low power boost converter

Fig. 4. PV array output voltage without and with boost converter

Fig. 5. Output voltage of the high step up DC-DC converter

 CONCLUSION:

This paper proposed another PV based DVR to lessen the vitality utilization from the utility network. The plan of a Dynamic Voltage Restorer (DVR) which consolidates a PV exhibit module with low and high power support converters as a DC voltage source to relieve voltage hangs, swells and blackouts in low voltage single stage conveyance frameworks utilizing FL controller has been introduced. The displaying and reenactment of the proposed PV based DVR utilizing MATLAB simulink has been exhibited. The FL controller uses the blunder motion from the comparator to trigger the switches of an inverter utilizing a sinusoidal PWM conspire. The proposed DVR uses the vitality drawn from the PV cluster and the utility source to charge the battries amid typical task. The put away energies in battery are changed over to a customizable single stage air conditioning voltage for alleviation of voltage list, swell and blackout. The recreation result demonstrates that the PV based DVR with FL controller gives better unique execution in alleviating the voltage varieties. The proposed DVR is worked in:

Reserve Mode: when the PV exhibit voltage is zero and the inverter isn’t dynamic in the circuit to hold the voltage to its ostensible esteem.

Dynamic Mode: when the DVR faculties the list, swell and blackout. DVR responds quick to infuse the required single stage pay voltages.

Sidestep Mode: when DVR is separated and skirted if there should arise an occurrence of support and fix.

Power Saver mode: when the PV cluster with low advance up dc-dc converter yield control is sufficient to deal with the heap.

Further work will incorporate a correlation with research facility investigates a low voltage DVR so as to think about recreation and trial results. The various elements of DVR require further examination.

Performance Improvement of DVR by Control of Reduced-Rating with A Battery Energy Storage

ABSTRACT:

Performance improvement of Voltage infusion strategies for DVRs (Dynamic Voltage Restorers) and working modes are settled in this paper. Utilizing fuzzy logic control DVR with dc link& with Battery Energy Storage System frameworks are worked. Power quality issues for the most part consonant contortion, voltage swell and droop are diminished with DVR utilizing Synchronous Reference Theory (SRF hypothesis) with the assistance of fuzzificaton waveforms are watched.

 

 BLOCK DIAGRAM:

 Fig.1.Block Diagram of DVR

 EXPECTED SIMULATION RESULTS:

Fig.2 Voltage waveforms at common coupling point (PCC) and load during harmonic distortion

Fig.3. the dc voltage injection from Battery energy Storage System connected DVR system at voltage swelling period

 Fig.4. DVR waveforms during voltage sag at time of voltage in phase injection

 Fig.5 Amplitude of load voltages and PCC voltages w.r.t time

 Fig 6.DVR waveforms during harmonic distortion at the time of voltage in phase injection

CONCLUSION:

By applying distinctive voltage infusion conspires the job of DVR has been appeared with a most recent control strategy. The introduction of DVR has been offset with different plans with a decreased rating VSC. For gaining the power of DVR, the reference stack voltages have been resolved with the assistance of unit vectors, for which the blunder of voltage addition is diminished. By utilizing SRF hypothesis the reference DVR voltages have been resolved. At last, the outcome inferred are that the in stage voltage addition with PCC voltage diminishes the DVR rating and yet at its DC transport the vitality source is squandered. battery energy storage system. Performance Improvement of DVR by Control of Reduced-Rating with A Battery Energy Storage.

 

Compensation Of Voltage Sag And Harmonics By Dynamic Voltage Restorer Without Zero Sequence Blocking

ABSTRACT:

Dynamic Voltage Restorer (DVR) is a power electronic gadget to protection delicate stress from voltage hang. Regularly, delicate burdens are electronic-based gadgets which create music. This paper presents soft polar based DVR as voltage hang restorer and sounds compensator without zero succession blocking. Research exhibited in this paper utilizes d-q-0 pivot technique considering of the estimation of unbiased hub, in light of the fact that the strategy works great if the impartial hub esteem is zero. Result demonstrates that this strategy can repay voltage sag and harmonics with a pay blunder of 0.99%. Utilizing this technique, DVR may lessen voltage THD from 10.22% to 0.66%.

 BLOCK DIAGRAM:

 

 Fig.1 Dynamic voltage restorer

EXPECTED SIMULATION RESULTS:

 

 Fig. 2 Distorted voltages at bus C

Fig. 3 Voltage at bus C after DVR

Fig.4 70% sag at bus C caused by phase-phase-ground fault

Fig.5 70% sag at bus C (caused by phase-phase- ground fault) restored by DVR

CONCLUSION:

The reproduction of a DVR utilizing MATLAB has been introduced. Recreation results demonstrate that DVR can reestablish both the voltage droop and voltage sounds. The proficiency and viability in voltage hang rebuilding and voltage sounds remuneration appeared by the DVR makes it an intriguing force quality gadget contrasted with other custom power gadgets. Under typical condition, DVR can diminish voltage THD from 10.22 % to 0.66%. What’s more, utilizing the proposed strategy, DVR can reestablish hilter kilter voltage droop without zero blocking transformer. The normal mistake of DVR voltage list remuneration is 0.99. voltage sag and harmonics.

Balanced Voltage Sag Correction Using Dynamic Voltage Restorer Based Fuzzy Polar Controller

ABSTRACT:

Numerous controllers based fluffy rationale have been connected on electric power framework. As often as possible, time reaction of the fluffy controllers is gradually, on the grounds that the quantity of participation capacities are too much. Many research are proposed to limit the quantity of enrollment work, for example, fluffy polar controller technique. By utilizing this strategy, number of enrollment capacity can be limited, so the time reaction of the controller turn out to be quicker. This paper displays the Dynamic Voltage Restorer (DVR) based Fuzzy Polar Controller Method to remunerate adjusted voltage list. Reenactment results demonstrate this proposed technique can repay adjusted voltage hang superior to PI controller.

 

 BLOCK DIAGRAM:


 Fig. 1. Block diagram of DVR

EXPECTED SIMULATION RESULTS:

 Fig. 2. 50% of voltage sags at bus A

Fig. 3. 50% sags correction using DVR based PI Controller

Fig. 4. 50% sags correction using DVR based fuzzy polar controller

 CONCLUSION:

DVR based PI Controller can keep up half voltage hangs at 110 % and 30% voltage droops at 98%. DVR based Fuzzy Polar Controller can keep up half voltage lists at 100 % and 30% voltage lists at 97%. As per the mistake normal everything being equal, are demonstrated that the execution of DVR based Fuzzy Polar Controller superior to DVR based PI Controller. Further investigation for unbalance remedy is being attempted to demonstrate the viability of the proposed controller.

 

Single Phase Dynamic Voltage Restorer Topology Based on Five-level Ground point Shifting Inverter

ABSTRACT

A Single Phase Dynamic Voltage Restorer (DVR) based on five-level ground point shifting multilevel inverter topology has been proposed in this paper. The proposed inverter has a floating ground point. Therefore, by shifting the ground point, it is observed that the inverter circuit gives five output voltage levels from single DC voltage source. This configuration uses less number of switches compared to the existing multilevel inverter topologies. A fast sag swell identification technique using d-q reference frame is also discussed in this paper. This proposed topology of the DVR can compensate voltage sag, swell, flicker and maintain the required voltage at the load bus. The detailed simulation study is carried out using MATLAB/Simulink to validate the result.

 KEYWORDS

  1. Voltage sag
  2. Swell
  3. Ground Point Shifting Multilevel Inverter (GPSMI)
  4. Topology
  5. DVR

 SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM


Fig. 1. General structure of the proposed DVR.

EXPECTED SIMULATION RESULTS

Fig. 2. (a) Grid terminal voltage (vt) and (b) load voltage (vl) during sag

mitigation.

Fig. 3. direct axis value of the d-q reference frame which is used to detect

sag in the system.

Fig. 4. During voltage sag (a) grid terminal voltage (vt), (b) series injected

voltage (vinj) and (c) inverter terminal voltage (vinv).

Fig. 5. FFT analysis of the series injected voltage (vinj).

Fig. 6. (a) Grid terminal voltage and (b) load voltage during Voltage flicker

 CONCLUSION

This paper proposes dynamic voltage restorer based on the ground point shifting multilevel Inverter topology (GPSMI). And explained  the operation of the multilevel inverter and the power circuit diagram. The inverter topology requires less number of switches than conventional multi-level inverter. In this inverter topology, only two switches are active at any instant of time that reduce switch conduction loss. Using this multi-level inverter, reduced the passive filter requirement in the DVR topology. Proper PWM for this proposed inverter has been explained. Instantaneous sag identification technique using d-q reference frame has also been explained. This proposed DVR can mitigate the power quality problem like sag/swell and voltage flicker.

REFERENCES

 [1] IEEE Guide for Voltage Sag Indices,” in IEEE Std 1564-2014 , vol., no., pp.1-59, June 20 2014

[2] IEEE Guide for Identifying and Improving Voltage Quality in Power Systems,” in IEEE Std 1250-2011 (Revision of IEEE Std 1250-1995) , vol., no., pp.1-70, March 31 2011

[3] A. G ho sh and G. Led w i ch, ”Structures and control of a dynamic voltage regulator (DVR),” Power Engineering Society Winter Meeting, 2001. IEEE, Columbus, OH, 2001, pp. 1027-1032 vol.3. do i: 10.1109/PE  S W.2001.917209

[4] Hui wen Li u, Bowen Z hen g and X  ion  g Z h an, ”A comparison of two types of storage less DVR with a passive shunt converter,” 2016 IEEE 8th International Power Electronics and Motion Control Conference (I P EM C-EC CE Asia), He f e i, 2016, pp. 1280-1284.

[5] P. C. Lo h, D. M. Vi lath g  a m  u  w  a , S. K. tang, H. L. Long, ”Multilevel dynamic voltage restorer”, IEEE Power Electronic Letters, vol. 2, no. 4, pp. 125-130, Dec. 2004.

Improving the Performance of Cascaded H-bridge based Interline Dynamic Voltage Restorer

IEEE Transactions on Power Delivery, 2015

 ABSTRACT:

 An interline dynamic voltage restorer (IDVR) is a new device for sag mitigation which is made of several dynamic voltage restorers (DVRs) with a common DC link, where each DVR is connected in series with a distribution feeder. During sag period, active power can be transferred from a feeder to another one and voltage sags with long durations can be mitigated. IDVR compensation capacity, however, depends greatly on the load power factor and a higher load power factor causes lower performance of IDVR. To overcome this limitation, a new idea is presented in this paper which allows to reduce the load power factor under sag condition, and therefore, the compensation capacity is increased. The proposed IDVR employs two cascaded H-bridge multilevel converters to inject AC voltage with lower THD and eliminates necessity to low-frequency isolation transformers in one side. The validity of the proposed configuration is verified by simulations in the PSCAD/EMTDC environment. Then, experimental results on a scaled-down IDVR are presented to confirm the theoretical and simulation results.

 

KEYWORDS:

  1. Back-to-back converter
  2. Cascaded H-bridge
  3. Interline dynamic voltage restorer

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Power circuit schematic of the IDVR with active power exchanging capability.

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.4p.u.

Fig.3. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.6p.u.

 

CONCLUSION:

In this paper, a new configuration has been proposed which not only improves the compensation capacity of the IDVR at high power factors, but also increases the performance of the compensator to mitigate deep sags at fairly moderate power factors. These advantages were achieved by decreasing the load power factor during sag condition. In this technique, the source voltages are sensed continuously and when the voltage sag is detected, the shunt reactances are switched into the circuit and decrease the load power factors to improve IDVR performance. Finally, the simulation and practical results on the CHB based IDVR confirmed the effectiveness of the proposed configuration and control scheme.

 

REFERENCES:

  • F. Comesana, D.F. Freijedo, J.D. Gandoy, O. Lopez, A.G. Yepes, J. Malvar, “Mitigation of voltage sags, imbalances and harmonics in sensitive industrial loads by means of a series power line conditioner” Electric Power systems Research 84 (2012) 20–30
  • [2] A. Felce, S. A. C. A. Inelectra, G. Matas, and Y. Da Silva, “Voltage Sag Analysis and Solution for an Industrial Plant with Embedded Induction Motors,” In Industry Applications Conference, 2004. 39th IAS Annual Meeting. Conference Record of the 2004 IEEE, vol. 4, pp. 2573-2578. IEEE, 2004.
  • [3] A. Sannino, M. G. Miller, and M. H. J. Bollen, “Overview of voltage sag mitigation”, IEEE Power Eng. Soc. Winter Meeting, vol. 4, pp.2872 -2878 2000
  • [4] E. Babaei, M. F. Kangarlu, and M. Sabahi, “Mitigation of voltage disturbances using dynamic voltage restorer based on direct converters,” IEEE Trans. Power Del., 25, no. 4, pp. 2676–2683, Oct. 2010
  • [5] H. K. Al-Hadidi , A. M. Gole and D. A. Jacobson “A novel configuration for a cascade inverter-based dynamic voltage restorer with reduced energy storage requirements“, IEEE Trans. Power Del., vol. 23, no. 2, pp.881 -888 2008 .

 

A Two Degrees of Freedom Resonant Control Scheme for Voltage Sag Compensation in Dynamic Voltage Restorers

 

 IEEE Transactions on Power Electronics, 2017

ABSTRACT:

This paper presents a two degrees of freedom (2DOF) control scheme for voltage compensation in a dynamic voltage restorer (DVR). It commences with the model of the DVR power circuit, which is the starting point for the control design procedure. The control scheme is based on a 2DOF structure implemented in a stationary reference frame (α−β), with two nested controllers used to obtain a pass-band behavior of the closed-loop transfer function, and is capable of achieving both a balanced and an unbalanced voltage sag compensation. The 2DOF control has certain advantages with regard to traditional control methods, such as the possibility of ensuring that all the poles of the closed-loop transfer function are chosen without the need for observers and reducing the number of variables to be measured. The use of the well-known double control- loop schemes which employ feedback current controllers to reduce the resonance of the plant is, therefore, unnecessary. A simple control methodology permits the dynamic behavior of the system to be controlled and completely defines the location of the poles. Furthermore, extensive simulations and experimental results obtained using a 5 kW DVR laboratory prototype show the good performance of the proposed control strategy.

 

KEYWORDS:

  1. Power Quality
  2. Dynamic Voltage Restorer (DVR)
  3. Control Design
  4. Resonant Controller
  5. Stationary Frame Controller
  6. Voltage Sag.

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1. Power system with a DVR included.

 

EXPECTED SIMULATION RESULTS:

 

Figure 2. DVR simulation for a balanced voltage sag. (a) Line-to-neutral three-phase voltages at PCC, (b) line-to-neutral voltages generated by the DVR, (c) line-to-neutral load voltages, and (d) error signal in α − β (redblue).

Figure 3 DVR simulation for an unbalanced voltage sag. (a) Line-to-neutral three-phase voltages at PCC, (b) line-to-neutral voltages generated by the DVR, (c) line-to-neutral load voltages, and (d) error signal in α − β (redblue).

Figure 4. DVR simulation for a 30 % balanced voltage sag. (a) Line-to neutral three-phase voltages at PCC, (b) error signal in α − β (red-blue) for the 2DOF-Resonant scheme, (c) error signal in α − β (red-blue) for double loop scheme, and (d) error signal in α−β (red-blue) for the double-loop with Posicast scheme.

Figure 5. DVR simulation for a 30 % type-E unbalanced voltage sag. (a) Line-to-neutral three-phase voltages at PCC, (b) error signal in α − β (redblue) for the 2DOF-Resonant scheme, (c) error signal in α − β (red blue) for double-loop scheme, and (d) error signal in α − β (red-blue) for the double-loop with Posicast scheme.

 

 CONCLUSION:

This paper presents a control scheme based on two nested controllers for voltage sag compensation in a DVR. The nested regulators provide the control with two degrees of freedom, and the control scheme is implemented in the stationary reference frame. Furthermore, in order to accomplish the requirements for voltage sag compensation, it is necessary to track the component at the fundamental frequency. This is achieved using a resonant term in one of the controllers. The proposed control design methodology is able to define all the poles of the closed-loop system without observers and with a reduction in the number of variables that must be measured, thus making it possible to avoid the use of the traditional current loop employed in control schemes for the DVR. The structure with the nested regulators achieves perfect zero tracking error at the nominal frequency and blocks the DC offset, signifying that it has some advantages over other control methods, such as double-loop schemes with proportional-resonant regulators. Moreover, the design methodology is thoroughly explained when the delay in the calculations is taken into account.

In this case, the design procedure allows the dominant poles of the closed-loop system to be chosen. If the closed-loop poles are chosen carefully, this control structure can also be applied to other systems which require higher delays, e.g., power converter applications with a reduced switching frequency. The design methodology can additionally be extended to the discrete domain. Comprehensive simulated and experimental results corroborate the performance of the 2DOF-Resonant control scheme for balanced and unbalanced voltage sags. The proposed control scheme is able to compensate both types of voltage sags with a very fast transient response and an accurate tracking of the reference voltage, even when the different types of loads and frequency deviations of the grid voltages are considered. Extended comparisons with a PR controller using a double-loop scheme and a PR controller in a double loop with a Posicast regulator have been carried out, demonstrating that the performance of the 2DOF-Resonant controller is superior in all cases. Moreover, the study of the stability as regards parameter variations for the compared control schemes demonstrates the more robust behavior of the 2DOF-Resonant control scheme.

 

REFERENCES:

  • H. M. Quezada, J. R. Abbad, and T. G. S. Rom´an, “Assessment of energy distribution losses for increasing penetration of distributed generation,” IEEE Transactions on Power Systems, vol. 21, no. 2, pp. 533–540, May 2006.
  • K. Jukan, A. Jukan, and A. Toki´c, “Identification and assessment of key risks and power quality issues in liberalized electricity markets in europe,” International Journal of Engineering & Technology, vol. 11, no. 03, pp. 20–26, 2011.
  • EN-50160, European Standard EN-50160. Voltage Characteristics of Public Distribution Systems, CENELEC Std., November 1999.
  • 1547, IEEE Std. 1547-2003. Standard for Interconnecting Distributed Resources with Electric Power Systems, IEEE Std., June 2003.
  • P. Mahela and A. G. Shaik, “Topological aspects of power quality improvement techniques: A comprehensive overview,” Renewable and Sustainable Energy Reviews, vol. 58, pp. 1129–1142, May 2016.

 Compensation of Voltage Distribunces In SMIB System Using ANN Based DPFC Controller

International conference on Signal Processing, Communication, Power and Embedded System (SCOPES)-2016, IEEE

ABSTRACT: Since last decade, due to advancement in technology and increasing in the electrical loads and also due to complexity of the devices the quality of power distribution is decreases. A Power quality issue is nothing but distortions in current, voltage and frequency that affect the end user equipment or disoperation; these are main problems of power quality so compensation for these problems by DPFC is presented in this paper. The control circuits for DPFC are designed by using line currents, series reference voltages and these are controlled by conventional ANN controllers. The results are observed by MATLAB/SIMULINK model.

 KEYWORDS:

  1. Power Quality
  2. Voltage Sag
  3. DPFC
  4. Voltage Swell

 SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Figure 1: Schematic Diagram for DPFC

EXPECTED SIMULATION RESULTS:

Figure 2: Output Voltage during fault condition

Figure 3: Output Current during Fault Condition

Figure 4: Output voltage compensated by DPFC Controller

Figure 5: Compensated Output Current by DPFC Controller

Figure 6: Active and Reactive Power

Figure 7: THD value of system output voltage without DPFC

Figure 8: THD value of DPFC (pi controller) load Voltage

Figure 9: THD for output voltage under ANN Controller

 CONCLUSION:

In this paper we implemented a concept to controlling the power quality issues i.e. DPFC. The proposed theory of this device is mathematical formulation and analysis of voltage dips and their mitigations for a three phase source with linear load. In this paper we also proposed a concept of Ann controller for better controlling action. As compared to all other facts devices the DPFC based ANN has effectively control all power quality problems and with this technique we get the THD as 3.65% and finally the simulation results are shown above.

 REFERENCES:

  1. Ahmad Jamshidi, S.Masoud Barakati, and M.Moradi Ghahderijani presented a paper on “Impact of Distributed Power Flow Controller to Improve Power Quality Based on Synchronous Reference Frame Method” at IACSIT International Journal of Engineering and Technology, Vol. 4, No. 5, October 2012.
  2. Ahmad Jamshidi, S.Masoud Barakati, and Mohammad Moradi Ghahderijani posted a paper “Power Quality Improvement and Mitigation Case Study Using Distributed Power Flow Controller” on 978-1-4673-0158-9/12/$31.00 ©2012 IEEE.
  3. Srinivasarao, Budi, G. Sreenivasan, and Swathi Sharma. “Comparison of Facts Controller for Power Quality Problems in Power System”, Indian Journal of Science and Technology, 2015.
  4. J.R.Enslin, “Power mitigation problems,” in Proc. IEEE Int. Symp. Industrial Electronics (ISIE ’98), vol. 1, 1998, pp. 8– 20.
  5. Srinivasarao, Budi, G. Sreenivasan, and Swathi Sharma. “Mitigation of voltage sag for power quality improvement using DPFC system”, 2015 International Conference on Electrical Electronics Signals Communication and Optimization (EESCO), 2015.

Simulation of Distributed Power Flow Controller for Voltage Sag Compensation

ABSTRACT:

In this paper, we introduced a new series-shunt type FACTS controller called as distributed power flow controller to improve and maintain the power quality of an electrical power system. This DPFC method is same as the UPFC used to compensate the voltage sag and the current swell these are voltage based power quality problems. As compared to UPFC the common dc link capacitor is removed and three individual single phase converters are used instead of a three phase series converter. Series referral voltages, branch currents are used in this paper for designing control circuit. The evaluated values are obtained by using MATLAB/SIMULINK.

 KEYWORDS:

  1. DPFC
  2. Power Quality
  3. Voltage Sag
  4. Voltage Swell

 SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

Figure 1. Schematic diagram for DPFC.

EXPECTED SIMULATION RESULTS:

 

 Figure 2. Output voltage during fault condition.

Figure 3. Output current during fault condition.

Figure 4. Output voltage compensated by DPFC controller.

Figure 5. Compensated output current by DPFC controller.

Figure 6. Active and reactive power.

Figure 7. THD value of system output voltage without DPFC.

Figure 8. THD value of DPFC (pi controller) load voltage.

Figure 9. THD value of fuzzy controller output voltage.

 CONCLUSION:

In this paper we implemented a concept to controlling the power quality issues i.e DPFC. The proposed theory of this device is mathematical formulation and analysis of voltage dips and their mitigations for a three phase source with linear load. In this paper we also proposed a concept of fuzzy logic controller for better controlling action. As compared to all other facts devices the DPFC based Fuzzy has effectively control all power quality problems and with this technique we get the THD as 3.65% and finally the simulation results are shown above.

 REFERENCES:

  1. Jamshidi A, Barakati MS, Ghahderijani MM. Presented a paper on Impact of distributed power flow controller to improve power quality based on synchronous reference frame method. IACSIT International Journal of Engineering and Technology. 2012 Oct; 4(5):581–5.
  2. Jamshidi A, Barakati MS, Ghahderijani MM. Power quality improvement and mitigation case study using distributed power flow controller; 2012 IEEE International Symposium on Industrial Electronics (ISIE); 2012 May 28-31; Hangzhou; IEEE. p. 464-8.
  3. Patne NR, Thakre KL. Presents a topic on Factor affecting characteristics of voltages. Serbian Journal of Electrical Engg during fault in P.S Engineering. 2008 May; 5(1):171–82.
  4. Enslin JR. Power mitigation problems. Proceedings of IEEE International Symposium Industrial Electronics (ISIE ’98); 1998 Jun. 1:8–20.
  5. Chandra A. A review of active filters for power quality improvement. IEEE Trans Ind Electron. 1999 Oct; 46(5):960–71.