An Enhanced Voltage Sag Compensation Scheme for Dynamic Voltage Restorer

ABSTRACT:  

This paper manages enhancing the voltage nature of touchy burdens from voltage droops utilizing dynamic voltage restorer (DVR). The higher dynamic power necessity related with voltage stage hop remuneration has caused a generous ascent in size and cost of dc connect vitality stockpiling arrangement of DVR. The current control procedures either moderate the stage bounce or enhance the usage of dc interface vitality by (I) diminishing the abundancy of infused voltage, or (ii) advancing the dc transport vitality bolster. In this paper, an upgraded list pay procedure is suggested that mitigates the stage bounce in the heap voltage while enhancing the general droop remuneration time. A scientific examination demonstrates that the proposed strategy essentially builds the DVR list bolster time (over half) contrasted and the current stage bounce pay strategies. This upgrade can likewise be viewed as a significant decrease in dc interface capacitor measure for new establishment. The execution of proposed technique is assessed utilizing recreation contemplate lastly, confirmed tentatively on a scaled lab model.

 

CIRCUIT DIAGRAM:

 

 Fig. 1 Basic DVR based system configuration.

 EXPECTED SIMULATION RESULTS:

 

Fig. 2. Simulation results for the proposed sag compensation method for 50% sag depth. (a) PCC voltage, (b) load voltage, (c) DVR voltage, (d) DVR active and reactive power, and (e) dc link voltage.

Fig. 3. Simulation results for the proposed sag compensation method for 23% sag depth. (a) PCC voltage, (b) load voltage, (c) DVR voltage, (d) DVR active and reactive power, and (e) dc link voltage.

 CONCLUSION:

In this paper an upgraded hang remuneration conspire is proposed for capacitor bolstered DVR. The proposed procedure enhances the voltage nature of touchy loads by ensuring them against the lattice voltage droops including the stage bounce. It likewise builds remuneration time by working in least dynamic power mode through a controlled change once the stage bounce is redressed. To show the viability of the proposed technique a scientific correlation is completed with the current stage bounce pay plans. It is demonstrated that pay time can be reached out from 10 to 25 cycles (considering presag infusion as the reference strategy) for the planned furthest reaches of half droop profundity with 450 stage bounce. Further expansion in remuneration time can be accomplished for middle of the road droop profundities. This all-inclusive pay time can be viewed as extensive decrease in dc connect capacitor estimate (for the examined case over half) for the new establishment. The viability of the proposed strategy is assessed through broad recreations in MATLAB/Simulink and approved on a scaled lab model tentatively. The trial results exhibit the plausibility of the proposed stage hop remuneration strategy for viable applications.

 

An Enhanced Voltage Sag Compensation Scheme for Dynamic Voltage Restorer

IEEE Transactions on Industrial Electronics, 2013

ABSTRACT

This paper deals with improving the voltage quality of sensitive loads from voltage sags using dynamic voltage restorer (DVR). The higher active power requirement associated with voltage phase jump compensation has caused a substantial rise in size and cost of dc link energy storage system of DVR. The existing control strategies either mitigate the phase jump or improve the utilization of dc link energy by (i) reducing the amplitude of injected voltage, or (ii) optimizing the dc bus energy support. In this paper, an enhanced sag compensation strategy is proposed that mitigates the phase jump in the load voltage while improving the overall sag compensation time. An analytical study shows that the proposed method significantly increases the DVR sag support time (more than 50%) compared with the existing phase jump compensation methods. This enhancement can also be seen as a considerable reduction in dc link capacitor size for new installation. The performance of proposed method is evaluated using simulation study.

 

KEYWORDS:

  1. Dynamic voltage restorer (DVR)
  2. Voltage source inverter (VSI)
  3. Voltage sag compensation
  4. Voltage phase jump compensation.

 

SOFTWARE: MATLAB/SIMULINK

  

BLOCK DIAGRAM:

Fig. 1. Basic DVR based system configuration

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation results for the proposed sag compensation method for 50% sag depth. (a) PCC voltage, (b) load voltage, (c) DVR voltage, (d) DVR active and reactive power, and (e) dc link voltage.

Fig. 3. Simulation results for the proposed sag compensation method for 23% sag depth. (a) PCC voltage, (b) load voltage, (c) DVR voltage, (d) DVR active and reactive power, and (e) dc link voltage.

 

CONCLUSION

In this paper an enhanced sag compensation scheme is proposed for capacitor supported DVR. The proposed strategy improves the voltage quality of sensitive loads by protecting them against the grid voltage sags involving the phase jump. It also increases compensation time by operating in minimum active power mode through a controlled transition once the phase jump is compensated. To illustrate the effectiveness of the proposed method an analytical comparison is carried out with the existing phase jump compensation schemes. It is shown that compensation time can be extended from 10 to 25 cycles (considering pre sag injection as the reference method) for the designed limit of 50% sag depth with 450 phase jump. Further extension in compensation time can be achieved for intermediate sag depths. This extended compensation time can be seen as considerable reduction in dc link capacitor size (for the studied case more than 50%) for the new installation. The effectiveness of the proposed method is evaluated through extensive simulations in MATLAB/Simulink and validated on a scaled lab prototype experimentally. The experimental results demonstrate the feasibility of the proposed phase jump compensation method for practical applications.

 

REFERENCES

  • A. Martinez and J.M. Arnedo, “Voltage sag studies in distribution networks- part I: System modeling,” IEEE Trans. Power Del., vol. 21,no. 3, pp. 338–345, Jul. 2006.
  • G. Nielsen, F. Blaabjerg and N. Mohan, “Control strategies for dynamic voltage restorer, compensating voltage sags with phase jump,” in Proc. IEEE APEC, 2001, pp. 1267–1273.
  • D. Li, S.S. Choi, and D.M. Vilathgamuwa, “Impact of voltage phase jump on loads and its mitigation,” in Proc. 4th Int. Power Electron. Motion Control Conf., Xian, China, Aug. 14–16, 2004, vol. 3, pp. 1762– 176.
  • Sullivan, T. Vardell, and M. Johnson, “Power interruption costs to industrial and commercial consumers of electricity, IEEE Trans. Ind App., vol. 33, no. 6, pp. 1448–1458, Nov. 1997.
  • Kaniewski, Z. Fedyczak and G. Benysek “AC Voltage Sag/Swell Compensator Based on Three-Phase Hybrid Transformer With Buck- Boost Matrix-Reactance Chopper”, IEEE Trans. Ind. Electron., vol.61, issue. 8, Aug 2014.

 

Improving the Performance of Cascaded H-bridge based Interline Dynamic Voltage Restorer

IEEE Transactions on Power Delivery, 2015

 ABSTRACT:

 An interline dynamic voltage restorer (IDVR) is a new device for sag mitigation which is made of several dynamic voltage restorers (DVRs) with a common DC link, where each DVR is connected in series with a distribution feeder. During sag period, active power can be transferred from a feeder to another one and voltage sags with long durations can be mitigated. IDVR compensation capacity, however, depends greatly on the load power factor and a higher load power factor causes lower performance of IDVR. To overcome this limitation, a new idea is presented in this paper which allows to reduce the load power factor under sag condition, and therefore, the compensation capacity is increased. The proposed IDVR employs two cascaded H-bridge multilevel converters to inject AC voltage with lower THD and eliminates necessity to low-frequency isolation transformers in one side. The validity of the proposed configuration is verified by simulations in the PSCAD/EMTDC environment. Then, experimental results on a scaled-down IDVR are presented to confirm the theoretical and simulation results.

 

KEYWORDS:

  1. Back-to-back converter
  2. Cascaded H-bridge
  3. Interline dynamic voltage restorer

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Power circuit schematic of the IDVR with active power exchanging capability.

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.4p.u.

Fig.3. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.6p.u.

 

CONCLUSION:

In this paper, a new configuration has been proposed which not only improves the compensation capacity of the IDVR at high power factors, but also increases the performance of the compensator to mitigate deep sags at fairly moderate power factors. These advantages were achieved by decreasing the load power factor during sag condition. In this technique, the source voltages are sensed continuously and when the voltage sag is detected, the shunt reactances are switched into the circuit and decrease the load power factors to improve IDVR performance. Finally, the simulation and practical results on the CHB based IDVR confirmed the effectiveness of the proposed configuration and control scheme.

 

REFERENCES:

  • F. Comesana, D.F. Freijedo, J.D. Gandoy, O. Lopez, A.G. Yepes, J. Malvar, “Mitigation of voltage sags, imbalances and harmonics in sensitive industrial loads by means of a series power line conditioner” Electric Power systems Research 84 (2012) 20–30
  • [2] A. Felce, S. A. C. A. Inelectra, G. Matas, and Y. Da Silva, “Voltage Sag Analysis and Solution for an Industrial Plant with Embedded Induction Motors,” In Industry Applications Conference, 2004. 39th IAS Annual Meeting. Conference Record of the 2004 IEEE, vol. 4, pp. 2573-2578. IEEE, 2004.
  • [3] A. Sannino, M. G. Miller, and M. H. J. Bollen, “Overview of voltage sag mitigation”, IEEE Power Eng. Soc. Winter Meeting, vol. 4, pp.2872 -2878 2000
  • [4] E. Babaei, M. F. Kangarlu, and M. Sabahi, “Mitigation of voltage disturbances using dynamic voltage restorer based on direct converters,” IEEE Trans. Power Del., 25, no. 4, pp. 2676–2683, Oct. 2010
  • [5] H. K. Al-Hadidi , A. M. Gole and D. A. Jacobson “A novel configuration for a cascade inverter-based dynamic voltage restorer with reduced energy storage requirements“, IEEE Trans. Power Del., vol. 23, no. 2, pp.881 -888 2008 .

 

Design and Evaluation of a Mini-Size SMES Magnet for Hybrid Energy Storage Application in a kW-Class Dynamic Voltage Restorer

IEEE Transactions on Applied Superconductivity, 2017

ABSTRACT:

This paper presents the design and evaluation of a mini-size GdBCO magnet for hybrid energy storage (HES) application in a kW-class dynamic voltage restorer (DVR). The HES-based DVR concept integrates with one fast-response highpower superconducting magnetic energy storage (SMES) unit and one low-cost high-capacity battery energy storage (BES) unit. Structural design, fabrication process and finite-elementmodeling (FEM) simulation of a 3.25 mH/240 A SMES magnet wound by state-of-the-art GdBCO tapes in SuNAM are presented. To avoid the internal soldering junctions and enhance the critical current of the magnet simultaneously, an improved continuous disk winding (CDW) method is proposed by introducing different gaps between adjacent single-pancake coil layers inside the magnet. About 4.41% increment in critical current and about 3.42% increment in energy storage capacity are demonstrated compared to a conventional CDW method. By integrating a 40 V/100 Ah valve-regulated lead-acid (VRLA) battery, the SMES magnet is applied to form a laboratory HES device for designing the kW-class DVR. For protecting a 380 V/5 kW sensitive load from 50% voltage sag, the SMES unit in the HES based scheme is demonstrated to avoid an initial discharge time delay of about 2.5 ms and a rushing discharging current of about 149.15 A in the sole BES based scheme, and the BES unit  is more economically feasible than the sole SMES based scheme for extending the compensation time duration.

KEYWORDS:

  1. Superconducting magnetic energy storage (SMES)
  2. SMES magnet design, hybrid energy storage (HES)
  3. Battery energy storage (BES)
  4. Continuous disk winding (CDW)
  5. Dynamic voltage restorer (DVR)
  6. Voltage sag compensation

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. Circuit topology of the HES-based DVR.

 EXPECTED SIMULATION RESULTS:

 

 Fig. 2. Transient voltage curves: (a) Load voltage before compensation; (b) Compensation voltage from the DVR; (c) Load voltage after compensation.

Fig. 3. Transient voltage curves: (a) Load voltage before compensation; (b) Compensation voltage from the DVR; (c) Load voltage after compensation.

CONCLUSION:

The structural design, fabrication process and FEM simulation of a 3.25 mH/240 A SMES magnet wound by state-of-the-art GdBCO tapes have been presented in this paper. The FEM simulation results have proved the performance enhancements in both the critical current and energy storage capacity by using the improved CDW scheme. Such a mini-size SMES magnet having relatively high power and low energy storage capacity is further applied to combine with a 40 V/100 Ah VRLA battery for developing a laboratory HES device in a kW-class DVR. In a 5 Kw sensitive load applications case, voltage sag compensation characteristics of three different DVR schemes by using a sole SMES system, a sole BES system and a SMES-BES-based HES device have been discussed and compared. With the fast-response high-power SMES, the maximum output current from the BES system is reduced from about 149.15 A in the BES-based DVR to 62.5 A in the HES-based DVR, and the drawback from the initial discharge time delay caused by the inevitable energy conversion process is offset by integrating the SMES system. With the low-cost high-capacity BES, practical compensation time duration is extended from about 32 ms in the SMES-based DVR to a longer duration determined by the BES capacity. Therefore, the proposed HES concept integrated with fast-response high-power SMES unit and low-cost high-capacity BES unit can be well expected to apply in practical large-scale DVR developments and other similar SMES applications.

REFERENCES:

[1] Mohd. H. Ali, B. Wu, and R. A. Dougal, “An overview of SMES applications in power and energy systems,” IEEE Trans. Sustainable Energy, vol. 1, no. 1, pp. 38-47, 2010.

[2] X. Y. Chen et al., “Integrated SMES technology for modern power system and future smart grid,” IEEE Trans. Appl. Supercond., vol. 24, no. 5, Oct. 2014, Art. ID 3801605.

[3] IEEE Std 1159-2009, IEEE Recommended Practice for Monitoring Electric Power Quality, 2009.

[4] X. H. Jiang et al., “A 150 kVA/0.3 MJ SMES voltage sag compensation system,” IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 1903-1906, Jun. 2005.

[5] S. Nagaya et al., “Field test results of the 5 MVA SMES system for bridging instantaneous voltage dips,” IEEE Trans. Appl. Supercond., vol. 16, no. 2, pp. 632-635, Jun. 2006.