New Three-Phase Symmetrical MultilevelVoltage Source Inverter

ABSTRACT:  

This paper presents a new design and implementation of a three-phase multilevel inverter (MLI) for distributed power generation system using low frequency modulation and sinusoidal pulse width modulation (SPWM) as well. It is a modular type and it can be extended for extra number of output voltage levels by adding additional modular stages. The impact of the proposed topology is its proficiency to maximize the number of voltage levels using a reduced number of isolated dc voltage sources and electronic switches. Moreover, this paper proposes a significant factor (FC/L), which is developed to define the number of the required components per pole voltage level.

A detailed comparison based on (FC/L) is provided in order to categorize the different topologies of the MLIs addressed in the literature. In addition, a prototype has been developed and tested for various modulation indexes to verify the control technique and performance of the topology. Experimental results show a well-matching and good similarity with the simulation results.

KEYWORDS:
  1. Low frequency modulation
  2. Multi-level inverter
  3. Multi-level inverter comparison factor
  4. Sinusoidal pulse-width modulation (SPWM)
  5. Symmetrical DC power sources
  6. Three-phase

 SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

Fig. 1. Proposed three-phase MLI topology.

 EXPECTED SIMULATION RESULTS:

Fig. 2. Output line-to-line voltages ( VAB,VBC , and VCA ) with low frequency (50 Hz) modulation technique. (a) Simulation.

Fig. 3. Output phase voltages ( VAN,VBN , and VCN ) with low frequency modulation technique. (a) Simulation.

Fig. 4. Inverter outputs with R-L load (VAB ,VAN , and IAN) with low frequency modulation technique. (a) Simulation.

Fig. 5. Pole voltages for scheme I, mi =0.95 and fs=2.5kHz. (a) Simulation.

Fig. 6. Line-to-line voltages for scheme I, mi =0.95 and fs=2.5kHz . (a) Simulation.

Fig. 7. Phase voltages for scheme I, mi =0.95 and fs=2.5kHz . (a) Simulation.

Fig. 8. Pole voltages for scheme II, mi =0.95 and fs=2.5kHz . (a) Simulation.

Fig. 9. Line-to-line voltages for scheme II, mi =0.95 and fs=2.5kHz  . (a) Simulation.

Fig. 10. Phase voltages for scheme II, mi =0.95 and fs=2.5kHz. (a) Simulation.

Fig. 11. Line-to-line voltage and phase voltage at for scheme I, mi =0.95 and fs=2.5kHz . (a) Simulation.

Fig. 12. Line-to-line voltage and phase voltage for scheme II, mi =0.95 and fs=2.5kHz . (a) Simulation.

Fig. 13. Inverter output voltages: (a) three phase line-to-line voltages ( VAB, VBC, and VCA ), (b) line-to-line voltage, phase voltage and the phase current under R-L load.

 CONCLUSION:

A new modular multilevel inverter topology using two modulation control techniques is presented. The proposed has several advantages compared with existing topologies. A lower number of components count such as isolated dc-power supplies, switching devices, electrolyte capacitors, and power diodes are required. So it exhibits the merits of high efficiency, lower cost, simplified control algorithm, smaller inverter’s foot print and increased the overall system reliability. Due to the modularity of the presented topology, it can be extended to higher stages number leads to a good performance issues such as low, low, and low and eliminating the output filter will be obtained.

Beside the low frequency modulation, two schemes are successfully applied to control the suggested . This paper also suggests a significant factor, which defines the required components to generate one voltage level across the output pole terminals. The issue related to the cost of each used component is out of scope of this paper. The system simulation model and its control algorithm are developed using PSIM and MATLAB software package tools to validate the proposed topology. A laboratory prototype has been developed and tested for various modulation indexes to verify the control techniques and performance of the topology, the similarity between the simulation and obtained experimental results was confirmed.

REFERENCES:

[1] S. J. Park, F. S. Kang, M. H. Lee, and C. U. Kim, “A new single-phase five-level PWM inverter employing a deadbeat control scheme,” IEEE Trans. Power Electron., vol. 18, no. 3, pp. 831–843, May 2003.

[2] V. G. Agelidis, D. M. Baker, W. B. Lawrance, and C. V. Nayar, “A multilevel PWM inverter topology for photovoltaic applications,” in Proc. Int. Symp. Ind. Electron., Jul. 1997, vol. 2, pp. 589–594.

[3] G. J. Su, “Multilevel DC-link inverter,” IEEE Trans. Ind. Appl., vol. 41, no. 3, pp. 848–854, May–Jun. 2005.

[4] M. Calais, L. J. Borle, and V. G. Agelidis, “Analysis of multicarrier PWM methods for a single-phase five level inverter,” in Proc. Power Electron. Specialists Conf., 2001, vol. 3, pp. 1351–1356.

[5] C. T. Pan, C. M. Lai, and Y. L. Juan, “Output current ripple-free PWM inverters,” IEEE Trans. Circuits Syst. II, Exp. Briefs., vol. 57, no. 10, pp. 823–827, Oct. 2010.

Zero-Voltage-Switching Sinusoidal Pulse Width Modulation Method for Three-phase Four-wire Inverter

ABSTRACT:  

A Zero-Voltage-Switching (ZVS) sinusoidal pulse width modulation (SPWM) method for three-phase four-wire inverter is proposed in order to achieve higher efficiency and power density. With the proposed modulation scheme, the ZVS operation of all switches including the main switches and the auxiliary switch can be realized. Besides, all seven switches operate at a fixed frequency. The ZVS SPWM scheme is introduced by considering the various combinations of the polarities in three-phase filter inductors currents and analysis of operating stages is presented. ZVS condition of the ZVS SPWM scheme is derived and discussions of ZVS condition for typical three-phase loads are also provided. In addition, the resonant parameters design and loss analysis are briefly investigated. Finally the proposed ZVS SPWM scheme is verified on a 10 kW inverter prototype with SiC MOSFET devices.

 KEYWORDS:

  1. Zero-Voltage-Switching (ZVS)
  2. Sinusoidal pulse width modulation (SPWM)
  3. Three-phase four-wire inverter

 SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

Fig. 1. ZVS three-phase four-wire inverter.

 EXPECTED SIMULATION RESULTS:

         (a)                                        (b)

     (c)            (d)

Fig. 2. Three-phase load voltages and filter inductors currents of the ZVS inverter under balanced resistive load: (a) Three-phase load voltage, (b) load voltage and filter inductor current of phase A, (c) load voltage and filter inductor current of phase B, and (d) load voltage and filter inductor current of phase C.

(a)                    (b)

  •                                

(c)                                       (d)

Fig. 3. Three-phase load voltages and filter inductors currents of the ZVS inverter under unbalanced resistive load: (a) Three-phase load voltage, (b) load voltage and filter inductor current of phase A, (c) load voltage and filter inductor current of phase B, and (d) load voltage and filter inductor current of  phase C.

(a)                        (b)

 (c)                                     (d)

Fig. 4. Three-phase load voltages and filter inductors currents of the ZVS inverter under unbalanced inductive load: (a) Three-phase load voltage, (b)  load voltage and filter inductor current of phase A, (c) load voltage and filter inductor current of phase B, and (d) load voltage and filter inductor current of phase C.

 CONCLUSION:

 A ZVS SPWM method combining with aligned turn on gate signals and extra short circuit stage is proposed for three-phase four-wire inverter. The generalized ZVS condition of the ZVS SPWM scheme is derived and the discussions of ZVS condition for some typical three-phase loads are provided. For balanced resistive load, balanced inductive load and unbalanced resistive load, short circuit stage is required. The short circuit stage may not be needed during several intervals for some kinds of unbalanced inductive load. The estimated loss analysis show that significant efficiency advantages can be obtained by ZVS three-phase four-wire inverter at high switching frequency in comparison with the hard switching three-phase four-wire inverter.

The ZVS turn-on of all switches, including the main switches and auxiliary switch under both balanced and unbalanced resistive load are achieved in the complete fundamental period with experimental verification. Besides, the ZVS SPWM inverter shows significant efficiency advantage. The measured highest conversion efficiency of the ZVS SPWM inverter is 98.3 % and 1.7 % higher than that of the hard switching inverter. At full load, the ZVS SPWM inverter has 2.1 % higher efficiency than the hard switching inverter.

REFERENCES:

[1] M. E. Fraser, C. D. Manning and B. M. Wells, “Transformerless four-wire PWM rectifier and its application in AC-DC-AC converters, ” in IEE Proceedings – Electric Power Applications, vol. 142, no. 6, pp. 410-416, Nov 1995.

[2] M. Dai, M. N. Marwali, J. W. Jung and A. Keyhani, “A Three-Phase Four-Wire Inverter Control Technique for a Single Distributed Generation Unit in Island Mode,” in IEEE Transactions on Power Electronics, vol. 23, no. 1, pp. 322-331, Jan. 2008.

[3] E. L. L. Fabricio, S. C. S. Júnior, C. B. Jacobina and M. B. de Rossiter Corrêa, “Analysis of Main Topologies of Shunt Active Power Filters Applied to Four-Wire Systems,” in IEEE Transactions on Power Electronics, vol. 33, no. 3, pp. 2100-2112, March 2018.

[4] H. Zhang, C. da Sun, Z. x. Li, J. Liu, H. y. Cao and X. Zhang, “Voltage Vector Error Fault Diagnosis for Open-Circuit Faults of Three-Phase Four-Wire Active Power Filters,” in IEEE Transactions on Power Electronics, vol. 32, no. 3, pp. 2215-2226, March 2017.

[5] M. V. Manoj Kumar and M. K. Mishra, “Three-leg inverter-based distribution static compensator topology for compensating unbalanced and non-linear loads,” in IET Power Electronics, vol. 8, no. 11, pp. 2076-2084, 11 2015.

Modeling and Simulation of a Distribution STATCOM (D-STATCOM) for Power Quality Problems-Voltage Sag and Swell Based on Sinusoidal Pulse Width Modulation (SPWM)

ABSTRACT:

This paper presents the systematic procedure of the modeling and simulation of a Distribution STATCOM (DSTATCOM) for power quality problems, voltage sag and swell based on Sinusoidal Pulse Width Modulation (SPWM) technique. Power quality is an occurrence manifested as a nonstandard voltage, current or frequency that results in a failure of end use equipments. The major problems dealt here is the voltage sag and swell. To solve this problem, custom power devices are used. One of those devices is the Distribution STATCOM (D-STATCOM), which is the most efficient and effective modern custom power device used in power distribution networks. D-STATCOM injects a current in to the system to correct the voltage sag and swell.The control of the Voltage Source Converter (VSC) is done with the help of SPWM. The proposed D-STATCOM is modeled and simulated using MATLAB/SIMULINK software.

KEYWORDS:

  1. Distribution STATCOM (D-STATCOM)
  2. MATLAB/SIMULINK
  3. Power quality problems
  4. Sinusoidal Pulse  Width Modulation (SPWM)
  5. Voltage sag and swell
  6. Voltage  Source Converter (VSC)

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Schematic representation of the D-STATECOM for a typical custom

power application.

EXPECTED SIMULATION RESULTS:

 Fig. 2. Voltage Vrms at load point, with three-phase fault: (a) Without DSTATCOM and (b) With D-STATCOM, 750I-lf .

Fig. 3. Voltage vrms at load point, with three phase-ground fault: (a)

Without D-STATCOM and (b) With D-STATCOM.

Fig. 4. Voltage Vrms at load point, with line-ground fault: (a) Without DSTATCOM and (b) With D-STATCOM.

Fig. 5. Voltage vrms at load point, with line-line fault: (a) Without DSTATCOM and (b) With D-STATCOM.

Fig. 6. Voltage vrms at load point, with line-line-ground fault: (a) Without

D-STATCOM and (b) With D-STATCOM.

CONCLUSION:

This paper has presented the power quality problems such as voltage sags and swell. Compensation techniques of custom power electronic device D-ST ATCOM was presented. The   design and applications of D-STATCOM for voltage sags, swells and comprehensive results were presented. The Voltage Source Convert (VSC) was implemented with the help of Sinusoidal Pulse Width Modulation (SPWM). The control scheme was tested under a wide range of operating conditions, and it was observed to be very robust in every case. For modeling and simulation of a D-ST ATCOM by using the highly developed graphic facilities available in MA TLAB/SIMULINK were used. The simulations carried out here showed that the D-STATCOM provides relatively better voltage regulation capabilities.

 REFERENCES:

[I] O. Anaya-Lara, E. Acha, “Modeling and analysis of custom power  systems by PSCAD/EMTDC,” IEEE Trans. Power Delivery, vol. 17, no .I, pp. 266-272, January 2002.

[2] S. Ravi Kumar, S. Sivanagaraju, “Simualgion of D-Statcom and DVR in  power system,” ARPN jornal of engineering and applied science, vol. 2,   no. 3, pp. 7-13, June 2007.

[3] H. Hingorani, “Introducing custom power”, IEEE Spectrum, vol. 32, no.6, pp. 41-48, June 1995.

[4] N. Hingorani, “FACTS-Flexible ac transmission systems,” in Proc. IEE 5th Int Conf AC DC Transmission, London, U.K., 1991, Conf Pub.  345, pp. 1-7.

[5] Mahesh Singh, Vaibhav Tiwari, “Modeling analysis and soltion to  power quality problems,” unpublished.

A Novel Five-Level Voltage Source Inverter With Sinusoidal Pulse Width Modulator for Medium-Voltage Applications

IEEE Transactions on Power Electronics, 2015

ABSTRACT: This paper proposes a new five-level voltage source inverter for medium-voltage high-power applications. The proposed inverter is based on the upgrade of a four-level nested neutral-point clamped converter. This inverter can operate over a wide range of voltages without the need for connecting power semiconductor in series, has high-quality output voltage and fewer components compared to other classic five-level topologies. The features and operation of the proposed converter are studied and a simple sinusoidal PWM scheme is developed to control and balance the flying capacitors to their desired values. The performance of the proposed converter is evaluated by simulation and experimental results.

 KEYWORDS:

  1. Multilevel converter
  2. Dc–ac power conversion
  3. Sinusoidal pulse width modulation (SPWM)

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. New five-level three-phase inverter.

EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation waveforms in steady-state condition (a) inverter voltage, (b) output currents, and (c) voltages of flying capacitors (m = 0.95).

Fig. 3. Simulation waveforms in steady-state condition (a) inverter voltage,

(b) output currents, and (c) voltages of flying capacitors (m = 0.65).

Fig. 4. Simulation waveforms in steady-state condition (inductive load) (a)

inverter voltage, (b) output currents, and (c) voltages of flying capacitors (m = 0.95, PF = 0.7).

Fig. 5. Simulation waveforms in steady-state condition (capacitive load)

(a) inverter voltage, (b) output currents, and (c) voltages of flying capacitors (m = 0.9, PF = 0.7).

Fig. 6. Simulation waveforms in transient-state condition; load changes from half-load to full-load (a) inverter voltage, (b) output currents, and (c) voltages of flying capacitors (m = 0.95).

Fig. 7. Simulation waveforms; voltage of flying capacitors with and without

the controller

CONCLUSION:

This paper introduces a new five-level voltage source inverter for medium-voltage applications. The proposed topology is the upgrade of the four-level NNPC converter that can operate over a wide range of input voltage without any power semiconductor in series. The proposed converter has fewer components as com- pared with classic multilevel converters and the voltage across the power semiconductors is only one-fourth of the dc-link. A SPWM strategy is developed to control the output voltage and regulate the voltage of the flying capacitors. The proposed strategy is very intuitive and simple to implement in a digital system. The performance of the proposed converter is confirmed by simulation in MATLAB/Simulink environment and the feasibility of the proposed converter is evaluated experimentally and results are presented.

 REFERENCES:

[1] B. Wu, High-Power Converters and AC Drives. Piscataway, NJ, USA: IEEE Press, 2006.

[2] J. Rodriguez, S. Bernet, B. Wu, J. Pontt, and S. Kouro, “Multilevel voltagesource- converter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945, Dec. 2007.

[3] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[4] Y. Zhang, G. Adam, T. Lim, S. Finney, andB.Williams, “Hybrid multilevel converter: Capacitor voltage balancing limits and its extension,” IEEE Trans. Ind. Informat., vol. 9, no. 4, pp. 2063–2073, Aug. 2013.

[5] M. Saeedifard, R. Iravani, and J. Pou, “Analysis and control of DCcapacitor- voltage-drift phenomenon of a passive front-end five-level converter,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 3255–3266, Dec. 2007.

Design and Implementation of a Novel Multilevel DC–AC Inverter

ABSTRACT:

In this paper, a novel multilevel dc–ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals’ design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220 Vrms/2 kW is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%.

KEYWORDS:

  1. DC–AC inverter
  2. Digital signal processor (DSP)
  3. Maximum power point tracking (MPPT)
  4. Multilevel

 SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Block diagram of renewable system

EXPECTED SIMULATION RESULTS:

 Fig. 2. Waveforms of vgs1, vab, vo, and io at 500 W.

Fig. 3. Output voltage harmonic spectrum of vab calculated by FFT.

Fig. 4. Output voltage harmonic spectrum of vo calculated by FFT

Fig. 5. Waveforms of vC2, vo, and io at 1000 W.

Fig. 6. Waveforms of vC2, vo, and io at 2000 W.

Fig. 7. Waveforms of vo and io at 400 VA.

 CONCLUSION:

A novel seven-level inverter was designed and implemented with DSP in this paper. The main idea of the proposed configuration is to reduce the number of power device. The reduction of power device is proved by comparing with traditional structures. Finally, a laboratory prototype of seven-level inverter with 400-V input voltage and output 220 Vrms/2kW is implemented. Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%.

 REFERENCES:

[1] R. Gonzalez, E. Gubia, J. Lopez, and L. Marroyo, “Transformerless single-phase multilevel-based photovoltaic inverter,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2694–2702, Jul. 2008.

[2] S. Daher, J. Schmid, and F. L.M. Antunes, “Multilevel inverter topologies for stand-alone PV systems,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2703–2712, Jul. 2008.

[3] W. Yu, J. S. Lai, H. Qian, and C. Hutchens, “High-efficiency MOSFET inverter with H6-type configuration for photovoltaic nonisolated, acmodule applications,” IEEE Trans. Power Electron., vol. 26, no. 4, pp. 1253–1260, Apr. 2011.

[4] R. A. Ahmed, S. Mekhilef, and W. P. Hew, “New multilevel inverter topology with minimum number of switches,” in Proc. IEEE Region 10 Conf. (TENCON), 2010, pp. 1862–1867.

[5] M. R. Banaei and E. Salary, “New multilevel inverter with reduction of switches and gate driver,” in Proc. IEEE 18th Iran. Conf. Elect. Eng. (IECC), 2010, pp. 784–789.