Single Phase Series Active Power Filter Based on 15-Level Cascaded Inverter Topology

ABSTRACT:

A topology of series active power filter (SAP F) based on a single phase half-bridge cascaded multilevel invert er is proposed in order to compensate voltage harmonics of the load connected to the point of common coupling (P CC). This paper presents the main parts of the invert er and The proposed invert er with the simple control easily obtains any voltage reference. Therefore, the invert er acts as a harmonic source when the reference is a non-sinusoidal signal.

prototype

A prototype of 15-level invert er based SAP F is manufactured without using a parallel passive filter (PP F) because it is intended to represent the compensation capability of the SAP F by itself. The load connected to P CC whose voltage is non-sinusoidal is filtered both in simulation and experimental studies. The validity of the proposed invert er based SAP F is verified by simulation as well as experimental study. Both simulation and experimental results show that the proposed multilevel invert er is suitable for SAP F applications.

 

CIRCUIT DIAGRAM:

Figure 1. The basic configuration of the proposed system.

EXPECTED SIMULATION RESULTS:

Figure 2. Simulation results – Set I a) V p cc and V h P CC before compensation (50 V I div), b) invert er and load voltage after compensation (50 V I div).

Figure 3. Simulation results – Set 2 a) V p cc and V”p cc before compensation (50 V l div), b) invert er and load voltage after compensation (50 V I div).

CONCLUSION:

This paper proposes a single phase half-bridge cascaded multi level invert er based SAP F. The multi level invert er topology and operation principle is introduced and With the proposed topology, the number of output levels can easily be increased. Switching angles of the semiconductor devices used in the invert er are also obtained by a simple method, moreover A SAP F with the proposed invert er topology is simulated under different harmonic distortion levels of P CC.

aim

The aim of the simulation is to compensate the load voltage harmonics connected to P Cc. In addition to the simulations, the proposed SAP F prototype is designed and Using this prototype, experimental study is also performed. Microchip d s PIC 30 F 6010 is preferred as a controller in this prototype, because it is commercially available and inexpensive micro controller. The presentable results of the proposed system are summarized as follows;

results

  • The TH D values obtained from simulation study is similar to experimental results and the results of simulation and experimental studies demonstrate the accuracy of the simulation study.
  • The TH D values after compensation is reduced to 2.88% and 3.07% by using the proposed invert er based SAP F and After compensation, the waveform of load voltage is almost sinusoidal.
  • A highly distorted sinusoidal waveform with a TH D value of 24.12% is compensated with the proposed invert er based SAP F and the TH D value is reduced to 3.07%, with This it is shown that the proposed invert er is suitable for SAP F applications.

Both simulation and experimental studies show the validity of the proposed invert er as a SAP F.

REFERENCES:

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[2] F. Z. P e n g, H. A k a g i, and A. Na b a e, ” A new approach to harmonic compensation in power systems-A combined system of shunt passive and series active filters,” IEEE Trans. Ind. A pp l. , Vol. 26, No. 6, pp. 983- 990, N o v.l Dec. 1990.

[3] Z. Wang, Q. Wang, W. Y a o, and 1. Li u, “A series active power filter adopting hybrid control approach,” IEEE Trans. Power Electron. , Vol. 16, No. 3, pp. 301- 310, May 2001.

[4] H. Aka g i, ‘Trends in active power line conditioners,” IEEE Trans. Power Electron. , Vol. 9, No. 3, pp. 263- 268, May 1994.

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