A New Cascaded Switched-Capacitor Multilevel Inverter Based on Improved Series-Parallel Conversion with Less Number of Components

ABSTRACT

The aim of this study is to present a new structure for switched-capacitor multilevel inverters (SCMLIs) which can generate a great number of voltage levels with optimum number of components for both symmetric and asymmetric value of dc voltage sources. Proposed topology consists of a new switched-capacitor dc/dc converter (SCC) which has boost ability and can charge capacitors as self-balancing by using proposed binary asymmetrical algorithm and series-parallel conversion of power supply. Proposed SCC unit is used in new configuration as a sub-multilevel inverter (SMLI) and then, these proposed SMLIs are cascaded together and create a new cascaded multilevel inverter topology which is able to increase the number of output voltage levels remarkably without using any full H-bridge cell and also can pass the reverse current for inductive loads. In this case, two half bridges modules besides two additional switches are employed in each of SMLI units instead of using a full H-bridge cell which contribute to reduce the number of involved components in the current path, value of blocked voltage, the variety of isolated dc voltage sources and as a result the overall cost by less number of switches in comparison with other presented topologies. The validity of the proposed SCMLI has been carried out by several simulation and experimental results.

KEYWORDS

  1. Cascade sub-multilevel inverter
  2. Series-parallel conversion
  3. Self-charge balancing
  4. Switched-capacitor

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

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Fig. 1. Proposed 17-level structure

 EXPECTED SIMULATION RESULTS

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Fig. 2. Steady states output voltage and current waveforms (a) in simulation Fig. 12. Transient states of output waveforms in simulation (b) in experiment ( 250V/div& 2A/div)

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Fig. 3. Transient states of output waveforms in simulation

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Fig. 4. Harmonic orders (a) output voltage (b) output current in simulation

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Fig. 5. Observed output voltage waveform at no-load condition (250V/div)

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Fig. 6. Capacitors’ voltage ripple waveforms for first case study (a) in simulation (b) in experiment (25 V/dev&50V/div)

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Fig. 7. Blocked voltage waveforms across switches of S1 (25V/div), S2 (100V/div), T1 (50V/div), T2 and T3 (100V/div) from left to right in the experiment

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Fig. 8. Output voltage and current waveforms for (a) inductive load in experiment (250 V/div & 2 A/div) (b) sudden step load in simulation

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Fig. 9. Observed capacitors’ current (a) in simulation (b) in experiment (2A/div)

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Fig. 10. (a) laboratory prototype (b) Output 49-level voltage and current waveforms in the experiment (250V/div & 2A/div)

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Fig. 11. Across voltage waveforms of capacitors in upper and lower stages of SCCs in proposed 49-level inverter (a) v C 1 lower stage (5V/div) (b) v C 2 lower stage (10V/div) (c) v C 1 upper stage(25V/div) (d) v C 2 upper stage(50V/div)

 

CONCLUSION

In this paper, at the first, a new reduced components SCC topology was presented which has boost capability remarkably and also can pass the reverse current for inductive loads through existing power switches. The voltage of all capacitors in this structure is balanced by binary asymmetrical algorithm. Next, a new sub-multilevel structure based on suggested SCC was proposed which can generate all of the voltage levels at the output (even and odd). In this case, the conventional output H-bridge cell used to convert the polarity of SCC units, has been removed, therefore number of required IGBTs and other involved components, are decreased. After that, an optimizing  operation was presented which could obvious the number of required capacitors in each of SCC units that participate in the cascade sub-multilevel inverter (CSMLI) to generate maximum number of output voltage levels with less number of elements. Moreover comprehensive comparisons were given which prove the differences between improved symmetric and asymmetric CSMLIs in contrast to some of recently presented topologies in variety aspects. Finally, to confirm the performance and effectiveness of proposed CSMLI, several simulation and experimental results have been presented.

REFERENCES

[1] J. Chavarria, D. Biel, F. Guinjoan, C. Meza, and J. J. Negroni, “Energy balance control of PV cascaded multilevel grid-connected inverters under level-shifted and phase-shifted PWMs,” IEEE Trans. Ind. Electron. vol. 60, no. 1, pp. 98–111, Jan. 2013.

[2] G. Buticchi, E. Lorenzani, and G. Franceschini, “A five-level single-phase grid-connected converter for renewable distributed systems,” IEEE Trans. Ind. Electron., vol. 60, no. 3, pp. 906–918, Mar. 2013.

[3] J. Rodriguez, L. J.Sheng, and P. Fang Zheng, “Multilevel inverters: A survey of topologies, controls, and applications,” IEEE Trans. Ind Electron., vol. 49, no. 4, pp. 724–738, Aug. 2002.

[4] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Trans. Industrial Electronic Magazine, vol. 2, no. 2, pp. 28–39, Jun. 2008.

[5] M. M. Renge and H. M. Suryawanshi, “Five-Level Diode Clamped Inverter to Eliminate Common Mode Voltage and Reduce dv/dt in Medium Voltage Rating Induction Motor Drives,” IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1598-1607, Jul. 2008.

 

A Switched-Capacitor Inverter Using Series/Parallel Conversion with Inductive Load

ABSTRACT

A novel switched-capacitor inverter is proposed. The proposed inverter outputs larger voltage than the input voltage by switching the capacitors in series and in parallel. The maximum output voltage is determined by the number of the capacitors. The proposed inverter, which does not need any inductors, can be smaller than a conventional two-stage unit which consists of a boost converter and an inverter bridge. Its output harmonics are reduced compared to a conventional voltage source single phase full bridge inverter. In this paper, the circuit configuration, the theoretical operation, the simulation results with MATLAB/ SIMULINK, and the experimental results are shown. The experimental results accorded with the theoretical calculation and the simulation results.

KEYWORDS

  1. Charge pump
  2. Multicarrier PWM
  3. Multilevel Inverter
  4. Switched capacitor (SC)

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

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Fig. 1. Circuit topology of the switched-capacitor inverter using series/ parallel conversion.

 

EXPECTED SIMULATION RESULTS

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Fig. 2. Simulated voltage waveforms of the proposed inverter (n = 2) designed for high power at 4.50 [kW], switching frequency f = 40 [kHz] and reference waveform frequency fref = 1 [kHz]. (a) Bus voltage waveform vbus and (b) the output voltage waveform vout.

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Fig. 3. Simulated current waveforms of the capacitor iC1 in the proposed inverter (n = 2).(a) Designed for low power at 5.76 [W] and (b) designed for high power at 4.50 [kW].

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Fig. 4. Simulated spectra of the bus voltage waveform of the proposed inverters (n = 2) normalized with the fundamental component. (a) Designed for low power at 5.76 [W] and (b) designed for high power at 4.50 [kW].

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Fig. 5. Simulated bus voltage waveforms vbus and the voltage waveforms of the load resistance vR of the proposed inverter (n = 2) designed for low power at 5.76 [W] with an inductive load.

CONCLUSION

In this paper, a novel boost switched-capacitor inverter was proposed. The circuit topology was introduced. The modulation method, the determination method of the capacitance, and the loss calculation of the proposed inverter were shown. The circuit operation of the proposed inverter was confirmed by the simulation results and the experimental results with a resistive load and an inductive load. The proposed inverter outputs a larger voltage than the input voltage by switching the capacitors in series and in parallel. The inverter can operate with an inductive load. The structure of the inverter is simpler than the conventional switched-capacitor inverters. THD of the output waveform of the inverter is reduced compared to the conventional single phase full bridge inverter as the conventional multilevel inverter.

REFERENCES

[1] H. Liu, L. M. Tolbert, S. Khomfoi, B. Ozpineci, and Z. Du, “Hybrid cascaded multilevel inverter with PWM control method,” in Proc. IEEE Power Electron. Spec. Conf., Jun. 2008, pp. 162–166.

[2] A. Emadi, S. S. Williamson, and A. Khaligh, “Power electronics intensive solutions for advanced electric, hybrid electric, and fuel cell vehicular power systems,” IEEE Trans. Power Electron., vol. 21, no. 3, pp. 567–577, May 2006.

[3] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Ind. Electron. Mag., vol. 2, no. 2, pp. 28–39, Jun. 2008.

[4] Y. Hinago and H. Koizumi, “A single phase multilevel inverter using switched series/parallel DC voltage sources,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2643–2650, Aug. 2010.

[5] S. Chandrasekaran and L. U. Gokdere, “Integrated magnetics for interleaved DC–DC boost converter for fuel cell powered vehicles,” in Proc. IEEE Power Electron. Spec. Conf., Jun. 2004, pp. 356–361.