Sizing and Simulation of an Energy Sufficient Stand-alone PV Pumping System

ABSTRACT:

 In this paper, methods for sizing of PV pumping systems and the simulation of (DTC) Direct Torque Control of induction motor that is used for piloting a water pump supplied by a photovoltaic generator are presented. The sizing of the PV pumping system is based on the calculation of the water needs, the required hydraulic energy and the estimation of available solar power.

The best sizing of the PV pumping system may further help in reducing its cost and optimize its efficiency. The proposed system includes a solar panel, a DC/DC converter with MPPT control, a voltage inverter with pulse width modulation (PWM). The Pump is driven by a Three Phase Induction Motor. In order to control the water flow in the pump, Direct torque control of induction machine is used. The simulations are carried out in Matlab/Simulink.

KEYWORDS:
  1. MPPT
  2. DTC
  3. PV pumping
  4. Photovoltaic
  5. Three phase induction motor
  6. Induction machine (IM)
  7. Voltage inverter
  8. Pulse width modulation (PWM)

 SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

 

Fig. 1. System block diagram

EXPECTED SIMULATION RESULTS:

 Fig. 2. Band hysteresis of flux

Fig. 3. Statoric Flux evolution

Fig. 4. Electromagnetic Torque

Fig. 5. Stator current dq Axis

Fig. 6. The motor speed

CONCLUSION:

In this paper, a case study of stand-alone PV pumping system designed for irrigation needs in a remote site in Tunisia. The sizing method for the structure was presented. MPPT technique was used to optimize the power delivered by the photovoltaic module. Direct torque control technique served to control the induction machine speed and therefore the flow of the centrifugal pump. The paper presented the system block diagram, the MPPT control algorithm, the DTC block diagram and design.

The main objective of this work is to maximize savings in energy consumption by ensuring that pipelines and networks are sized and designed accurately. The use of DTC technique ensures better efficiency of the motor. The experimental results are satisfactory and suggest that the proposed solution can be a reliable option to overcome the lack of electricity at remote locations and rural areas. More reliability test and studies needs to be performed to guarantee its robustness, efficiency and cost effectiveness.

REFERENCES:

[1] “Solar resource maps for Tunisia”, Solargis S.R.O Slovakia, Maps.

[2] Chaabane. M, Ben Djemaa. A. and Kossentini, “A daily and hourly global irradiations in Tunisia extracted from Meteosat Wedax images”, Solar Energy, vol. 57, issue 6, pp. 449-457.

[3] Information obtained from the direction of the bureau of organic farming, CRDA Tozeur.

[4] T. Augustyn. “Energy efficiency and savings in pumping systems, The holistic approach”, Energy Efficiency Convention (SAEEC), 2012 Southern African.

[5] Jim McGovern, “Technical Note: Friction Factor Diagrams for Pipe Flow”, Dublin Institute of Technology, 2011.

Power Quality Analysis of a PV fed Seven Level Cascaded H-Bridge Multilevel Inverter

ABSTRACT:  

Efficient DC to DC and DC to AC converters play a vital role in the reliable performance of standalone and grid connected photovoltaic systems. This paper deals with DC to AC conversion by a seven level cascaded H-bridge multilevel inverter for a standalone photovoltaic system. The PV fed seven level cascaded H-bridge multilevel inverter is analyzed in two ways: 1) with equal voltage sources as input to the H bridges and 2) with unequal voltage sources as input.

A comparative study of the total harmonic distortion reduction in the PV fed multilevel inverter system with and without equal voltage sources as input is carried out. It is observed that with unequal voltage sources, the total harmonic distortion is increased than that with equal voltage sources as input to the PV fed seven level cascaded H-bridge multilevel inverter. Further, the study attempts to show that with an LC filter at the output stage of the multilevel inverter, the total harmonic reduction is significantly reduced and the power quality of the PV fed multilevel inverter system is highly improved. Results are verified using simulations done in MATLAB/Simulink environment.

KEYWORDS:

  1. Photo voltaic Array (PV Array)
  2. Cascaded Multilevel Inverter
  3. Pulse Width Modulation (PWMJ
  4. Total Harmonic Distortion (THD)

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

 Fig.1. Seven level Cascaded H-bridge multilevel inverter

 EXPECTED SIMULATION RESULTS:

Fig.2. (a)Seven level cascaded MLI output voltage (b) Harmonic spectrum of the output voltage

Fig.3.(a) Seven level cascaded MLI output current (b) Harmonic spectrum of the output current

Fig.4. (a) Output voltage of MLI with LC filter (b) Harmonic spectrum of the output voltage with LC filter

Fig.5. (a) Output current of MLI with LC filter (b) Harmonic spectrum of the output current with LC filter

Fig.6. (a) Output voltage of seven level multilevel inverter with unequal

voltage sources (b) Harmonic spectrum of the output voltage

Fig.7. (a) Output Current of seven level MLI with unequal voltage sources

(b) Harmonic spectrum of the output current

Fig.8. (a) Output voltage of seven level cascaded MLI with unequal voltage sources and LC filter (b) Harmonic spectrum of the output voltage with LC filter

Fig.9. (a) Output current of seven level cascaded MLI with unequal voltage sources and LC filter (b) Harmonic spectrum of the output current with LC filter

CONCLUSION:

 In this paper, an analysis of a seven level cascaded H bridge multilevel inverter for a standalone photovoltaic system is carried out 1) with equal voltage sources as input to the H-bridges and 2) with unequal voltage sources as  input. It is found that when equal voltage values are fed as input to the H-bridges of the multilevel inverter

There is a reduction in the total harmonic distortion of the MLI output when compared to that with unequal voltage sources as its input. It is also observed that with an LC filter at the output stage of the multilevel inverter in both the scenarios, the total harmonic reduction is significantly reduced and the power quality of the PV fed multilevel inverter system is highly improved.

 REFERENCES:

[1] Venkatachalam, Jovitha Jerome and J. Karpagam, “An experimental investigation on a multilevel inverter for solar energy applications,” International Journal of Electrical Power and Energy Systems, 2013, pp.157-167.

[2] Ebrahim Babaei, Mohammad Farhadi and Farshid Najaty, “Symmetric and asymmetric multilevel inverter topologies with reduced switching devices,” Electric Power Systems Research, 2012, pp. 122- 130.

[3] Jia-Min Shen, Hurng-Liahng Jinn-Chang Wu and Kuen-Der, “Five-Level Inverter for Renewable Power Generation System, IEEE transactions on energy conversion,” 2013, pp.257-266.

[4] Hui Peng, Makoto Hagiwara and Hirofumi Akagi, “Modeling and Analysis of Switching-Ripple Voltage on the DC Link  between a Diode Rectifier and a Modular Multilevel Cascade Inverter (MMCI),” IEEE transactions on power electronics, 2013, pp.75-84.

[5] Javier Chavarria, Domingo Bie!, Francesc Guinjoan, Carlos Meza and Juan J. Negroni, “Energy-Balance Control of PV  Cascaded Multilevel Grid-Connected Inverters Under LevelShifted and Phase-Shifted PWMs,” IEEE transactions on industrial electronics, 2013, pp.98-111.

A Novel Multilevel Inverter Based on Switched DC Sources

ABSTRACT:  

This paper presents a multilevel invert er that has been conceptualized to reduce component count, particularly for a large number of output levels. It comprises floating input dc sources alternately connected in opposite polarities with one another through power switches whereas each input dc level appears in the stepped load voltage either individually or in additive combinations with other input levels. This approach results in reduced number of power switches as compared to classical to p o log i e s. A single-phase five-level invert er demonstrates the working principle of the proposed topology. The simulation investigates the topology and an exhaustive comparison of the proposed topology is made against the classical cascaded H-bridge topology.

 SOFTWARE: MAT LAB/SIM U LINK

 CIRCUIT DIAGRAM:

 

Fig. 1. Single-phase invert er based on the proposed topology with two input sources.

 EXPECTED SIMULATION RESULTS:

 

 Fig. 2. (a) Reference and carrier wave forms for the proposed scheme for a five-level output. (b) Aggregated signal “a(t).”

Fig. 3. Switching pulse pattern for the five-level invert er.

Fig. 4. Simulation results. (a) Five-level voltage output. (b) Harmonic spectrum of the load voltage.

Fig. 5. Simulation results. (a) Load current waveform with an R L load (R =

2 Ω and L = 2 m H). (b) Harmonic spectrum of the load current.

 

CONCLUSION:

As M LI s are gaining interest, efforts are being directed toward reducing the device count for increased number of output levels, therefore A novel topology for M LI s has been proposed in this paper to reduce the device count. The working principle of the proposed topology has been explained, and mathematical formulations corresponding to output voltage, source currents, voltage stresses on switches, and power losses have been developed. Simulation studies performed on a five-level invert er based on the proposed structure have been validated experimentally.

Comparison

Comparison of the proposed topology with conventional top o l o g i es reveals that the proposed topology significantly reduces the number of power switches and associated gate driver circuits. Analytical comparisons on the basis of losses and switch cost indicate that the proposed topology is highly competitive. The proposed topology can be effectively employed for applications where isolated dc sources are available. The advantage of the reduction in the device count, however, imposes two limitations: 1) requirement of isolated dc sources as is the case with the C H B topology and 2) curtailed modular it y  and fault-tolerant capabilities as compared to the C H B topology.

REFERENCES

[1]S. K o u r o, M. Malinowski, K. Go pa k u m a r, J. P o u, L. Fran q u e lo, B. Wu, J. Rodriguez, M. Perez, and J. Leon, “Recent advances and industrial
applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57,
no. 8, pp. 2553–2580, Aug. 2010.
[2] G. But i c chi, E. Loren z an i, and G. France s chin i, “A five-level single-phase
grid-connected converter for renewable distributed systems,” IEEE Trans.
Ind. Electron., vol. 60, no. 3, pp. 906–918, Mar. 2013.

[3] J. Rodriguez, J.-S. La i, and F. Z h en g Peng, “Multilevel invert er s: A survey
of top o log i es, controls, applications,” IEEE Trans. Ind. Electron., vol. 49,
no. 4, pp. 724–738, Aug. 2002.
[4] S. De, D. Banerjee, K. Siva Kumar, K. Gopakumar, R. Ramchand, and
C. Patel, “Multilevel inverters for low-power application,” IET Power
Electronics, vol. 4, no. 4, pp. 384–392, Apr. 2011.
[5] M. Malinowski, K. Gopakumar, J. Rodriguez, and M. A. Pérez, “A survey
on cascaded multilevel inverters,” IEEE Trans. Ind. Electron., vol. 57,
no. 7, pp. 2197–2206, Jul. 2010

Grid Voltages Estimation for Three-Phase PWM Rectifiers Control Without AC Voltage Sensors

ABSTRACT

This paper proposes a new AC voltage sensor less control scheme for three-phase pulse width modulation rectifier. A new startup process to ensure a smooth starting of the system is also proposed. The sensor less control scheme uses an adaptive neural (AN) estimator inserted in voltage oriented control to eliminate the grid voltage sensors. The developed AN estimator combines an adaptive neural network in series with an adaptive neural filter. The AN estimator structure leads to simple, accurate and fast grid voltages estimation. And makes it ideal for low cost digital signal processor implementation. L y a p u n o v based stability and parameters tuning of the AN estimator are performed.

Simulation

Simulation and experimental tests are carried out to verify the feasibility and effectiveness of the AN estimator. Obtained results show that, the proposed AN estimator presented faster convergence and better accuracy than the second order generalized integrator based estimator. The new startup procedure avoided the over current and reduced the settling time. The AN estimator presented high performances even under distorted and unbalanced grid voltages.

BLOCK DIAGRAM:

Fig. 1. Overall structure of the developed AC voltage sensor less control.

EXPECTED SIMULATION RESULTS

Fig. 2. Steady state performances of the AN estimator in diode rectifier operation mode (experiment): (a) computed input voltages vαn and vβn, (b) actual AC line currents iα and iβ, (c) actual grid voltage eα, estimated grid voltage eα,est and estimation error and (d) actual grid voltage eβ, estimated grid voltage eβ,est and estimation error.

Fig. 3. Steady-state performances of the P LL in diode rectifier operation mode (experiment): (a) computed d q components (ed, e q) with actual grid  voltages and computed d q components (ed,est, e q,est) with estimated grid  voltages and (b) computed angles θ and θest with actual and estimated grid voltages, respectively.

Fig. 4. Performances of the AN estimator at startup (experiment): (a) input voltages vαn and vβn, (b) actual AC line currents iα and iβ, (c) reference and  measured DC link voltages (V dc ref, V dc), (d) actual grid voltage eα, estimated  grid voltage eα,est and estimation error and (d) actual grid voltage eβ, estimated grid voltage eβ,est and estimation error.

Fig. 5. Performances of the P LL at startup (experiment): (a) computed d q components (ed, e q) with actual grid voltages and computed d q components (ed,est, e q,est) with estimated grid voltages and (b) computed angles θ and θest with actual and estimated grid voltages, respectively.

Steady-state performances

Fig. 6. Transient performances of the AN estimator under dc ref step change (experiment): (a) actual grid voltage eα, estimated grid voltage eα,est and estimation error, (b) actual grid voltage eβ, estimated grid voltage eβ,est and estimation error, (c) actual AC line currents iα and iβ and (d) reference and measured DC link voltages.

Fig. 7. Transient performances of the P LL under V dc ref step change (experiment): (a) computed d q components (ed, e q) with actual grid voltages and computed d q components (ed,est, e q,est) with estimated grid voltages and (b) computed angles θ and θest with actual and estimated grid voltages, respectively.

Fig. 8. Transient performances of the AN estimator under load resistance variation (experiment): (a) actual grid voltage eα, estimated grid voltage eα,est and estimation error, (b) actual grid voltage eβ, estimated grid voltage eβ,est and estimation error and (c) actual AC line currents.

Fig. 9. Transient performances of the P LL under load resistance variation (experiment): (a) computed d q components (ed, e q) with actual grid voltages and computed d q components (ed,est, e q,est) with estimated grid voltages and (b) computed angles θ and θest with actual and estimated grid voltages, respectively.

Transient performances

Fig. 10. Transient performances of the AN estimator under symmetric grid voltages sag (experiment): (a) actual grid voltage eα, estimated grid voltage eα,est and estimation error and (b) actual grid voltage eβ, estimated grid voltage eβ,est and estimation error and (c) actual AC line currents.

Fig. 11. Transient performances of the P LL under symmetric grid voltages sag (experiment): (a) computed d q components (ed, e q) with actual grid voltages and computed d q components (ed,est, e  q,est) with estimated grid voltages and (b) computed angles θ and θest with actual and estimated grid voltages, respectively.

Transient performances

Fig. 12. Transient performances of the AN estimator under grid voltages unbalance (experiment): (a) actual grid voltage eα, estimated grid voltage eα,est and estimation error and (b) actual grid voltage eβ, estimated grid voltage eβ , est and estimation error and (c) actual AC line currents.

Fig. 13. Transient performances of the P LL under grid voltages unbalance (experiment): computed d q components (ed, e q) with actual grid voltages and computed d q components (ed,est, e q,est) with estimated grid voltages and (b) computed angles θ and θest with actual and estimated grid voltages, respectively.

Fig. 14. Transient performances of the AN estimator under distorted grid voltages (simulation): (a) actual grid voltage eα and estimated grid voltage eα,est, (b) actual grid voltage eβ and estimated grid voltage eβ,est and (c) actual AC line currents.

Fig. 15. Transient performances of the P LL under distorted grid voltages (simulation): computed d q components (ed, e q) with actual grid voltages and computed d q components (ed,est, e q,est) with estimated grid voltages and (b) computed angles θ and θest with actual and estimated grid voltages respectively.

CONCLUSION

In this work, a new AN estimator for eliminating the grid voltage sensors in V O C of three phase P WM rectifier has been proposed. The developed AN estimator combines estimation capability of the ANN and filtering property of the A NF. L y a p u no v’s theory based stability analysis has been exploited for optimal tuning of the AN estimator. Hence, simple, accurate and fast grid voltages estimation has been obtained. To avoid current overshoot and to reduce the settling time at the startup, a new startup process has been proposed to initialize the V O C. The effectiveness of the proposed procedure has been experimentally demonstrated.

comparison

A comparison between the proposed AN estimator and the recently developed SO GI based estimator has been conducted. This comparison has clearly indicated faster convergence and better accuracy of the proposed estimator. Finally, robustness of the AN estimator regarding to step change in DC link voltage reference, load resistance variation and non ideal grid voltages conditions (symmetrical sag, unbalance, distortion) has been investigated through simulation and experimental tests. The obtained results have demonstrated high performances of the proposed AN estimator within the analyzed working conditions.

REFERENCES

[1] R. Te o d o re s c u, M. L is er re, and P. Rodriguez, Grid converters for photo voltaic and wind power systems, John Wiley & Sons, 2011.

[2] A.-R. Ha it ham, M. Malinowski, and K. Al Had dad, Power electronics for renewable energy systems, transportation and industrial applications, John Wiley & Sons, 2014.

[3] T. Fried l i, M. Hart man n, and J. W. K o l a r, “The essence of three-phase PFC rectifier systems–Part e II,” IEEE Trans. Power Electron., vol. 29, no. 2, pp. 543–560, Feb. 2014.

[4] M. B. K e t z er and C. B. Jacob in a, “Sensor less control technique for P WM rectifiers with voltage disturbance rejection and adaptive power factor,” IEEE Trans. Ind. Electron., vol. 62, no. 2, pp. 1140–1151, Feb. 2015.

[5] A. Be ch o u c he, H. Se d d i k i, D. O u l d Ab d e s lam, and K. Mes bah, “Adaptive AC filter parameters identification for voltage oriented control of three phase voltage source rectifiers”, Int. J. Mod ell. Identification Control, vol. 24, no. 4, pp. 319–331, 2015.

[6] H. G h o l a mi-K he sh t and M. Mon fared, “Novel grid voltage estimation by means of the Newton–Rap h son optimization for three-phase grid
connected voltage source converters,” I ET Power Electron., vol. 7, no.
12, pp. 2945–2953, Dec. 2014.
[7] A. A. G hod k e and K. Chat t e r j e e, “One-cycle-controlled bidirectional
three-phase unity power factor ac–dc converter without having voltage
sensors,” I ET Power Electron., vol. 5, no. 9, pp. 1944–1955, Nov. 2012.

Simulation Analysis of DVR Performance for Voltage Sag Mitigation

ABSTRACT:

Voltage sag is truly one of intensity quality issue and it end up extreme to mechanical clients. Voltage hang can cause miss task to a few touchy electronic types of gear. That issue can be moderating with voltage infusion strategy utilizing custom power gadget, Dynamic Voltage Restorer (DVR). This paper presents displaying and investigation of a DVR with heartbeat width tweak (PWM) based controller utilizing Matlab/Simulink. The execution of the DVR relies upon the effectiveness of the control strategy associated with exchanging the inverter. This paper proposed two control procedures which is PI Controller (PI) and Fuzzy Logic Controller (FL). Complete outcomes are introduced to evaluate the execution of every controller as the best power quality arrangement. Different components that likewise can influence the execution and ability of DVR are displayed also.

 

 BLOCK DIAGRAM:

 Figure1. DVR Modelling using Matlab/Simulink

 EXPECTED SIMULATION RESULTS:

Figure 2. (a) Injection voltage from DVR controlled by PI ; (b) injection voltage controlled by FL

Figure 3. (a) Output voltage at load 1 after injection voltage from DVR controlled by PI; (b) Output voltage at load 1after injection voltage controlled by FL.

Figure 4. (a) Injection voltage from DVR controlled by PI; (b) injection voltage controlled by FL.

Figure 5. (a) Output voltage at load 1 after injection voltage from DVR controlled by PI; (b) Output voltage at load 1after injection voltage controlled by FL.

Figure 6. THD generated when PI controller is applied

Figure 7. THD generated when FL controller is applied.

CONCLUSION:

In this examination, the displaying and reenactment of DVR controlled by PI and FL Controller has been produced utilizing Matlab/Simulink. For both controller, the reenactment result demonstrates that the DVR repays the hang rapidly (70μs) and gives great voltage direction. DVR handles numerous types, adjusted and unequal blame with no troubles and infuses the proper voltage segment to address any blame circumstance happened in the supply voltage to keep the heap voltage adjusted and steady at the ostensible esteem. The two controllers demonstrate an incredible execution and create low THD (<5%). Notwithstanding, it very well may be seen that FL Controller gives better execution with THD produced with just 0.64% while PI created 1.68% THD. In any case, other a few factors that can influence the execution of DVR should be tended to for improvement of the yield voltage. These variables are the vitality stockpiling limit and transformer rating. From the recreation, it unmistakably demonstrates the significance of these two factors and how they influence the execution of DVR. Hence, with regards to usage, it is urgent to think about these elements, so the execution of DVR is enhanced.

Thermal Stresses Relief Carrier-Based PWM Strategy for Single Phase Multilevel Inverters

ABSTRACT

Enhancing power cycling capability of power semiconductor devices is highly demanded in order to increase the long term reliability of multilevel inverters. Ageing of power switches and their cooling systems leads to their accelerated damage due to excess power losses and junction temperatures. Therefore, thermal stresses relief (TSR) is the most effective solution for lifetime extension of power semiconductor devices. This paper presents a new thermal stresses relief carrier-based pulse width modulation (TSRPWM) strategy for extending the lifetime of semiconductor switches in single-phase multilevel inverters. The proposed strategy benefits the inherent redundancy among switching states in multilevel inverters to optimally relieve the thermally stressed device. The proposed algorithm maintains the inverter operation without increased stresses on healthy switches and without reduction of the output power ratings. In addition, the proposed algorithm preserves voltage balance of the DC-link capacitors. The proposed strategy is validated on single phase five level T-type inverter system with considering different locations of thermal stresses detection. Experimental prototype of the selected case study is built to verify the results. Moreover, comparisons with the most featured strategies in literature are given in detail.

 

BLOCK DIAGRAM

 Fig. 1. A schematic diagram of PWM controlled full bridge n-level T-type inverter

EXPECTED SIMULATION RESULTS

 Fig. 2. Simulation results of the proposed strategy at TSD in SA11 at mi=0.85.

 

 Fig. 3. Simulation results of the proposed strategy at TSD in SA11 at mi=0.45.

Fig. 4. Simulation results of the proposed TSRPWM strategy at TSD in SA12 and mi=0.85.

 

A Seven-Switch Five-Level Active-Neutral-Point-Clamped Converter and Its Optimal Modulation Strategy

ABSTRACT:

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium and high power applications. As one of the most popular hybrid multilevel inverter topologies, the Five-Level Active-Neutral-Point-Clamped inverter (5L-ANPC) combines the features of the conventional Flying-Capacitor (FC) type and Neutral-Point-Clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a Seven-Switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1KVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method.

KEYWORDS:

  1. Multilevel inverter
  2. Active-Neutral-Point-Clamped (ANPC) inverter
  3. Flying-Capacitor
  4. Pulse-Width-Modulation (PWM)

 SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

 

Fig.1 (a) Proposed topology.

 EXPECTED SIMULATION RESULTS

 

 Fig. 2. Simulation results under unity power factor condition. (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4.

Fig. 3. Simulation results under reactive power condition (PF = 0.9, capacitive). (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4

Fig. 4. Simulation results under reactive power condition (PF = 0). (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4.

Fig. 5. Experimental results under unity power factor condition: waveforms of inverter output voltage, grid voltage, FC voltage and output current.

CONCLUSION:

In this paper, a novel 7S-5L-ANPC inverter topology has been proposed. As compared with the conventional 5L-ANPC inverter, it requires seven active switches for single phase and a low current rating switch can be selected for the seventh switch under high power factor situation. The operating principles and switching states are presented. The detailed comparison between the proposed topology and the conventional 5L-ANPC topologies in terms of voltage stress and efficiency is made. The specific modulation strategy of 7S-5L-ANPC inverter under reactive power operation has been proposed. Computer simulation and experimental prototype based on a single phase 1KVA prototype have been carried out in unity power factor condition and reactive power condition. The validity and advantages of the proposed topology and modulation method are demonstrated.

REFERENCES:

[1] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. W. Bin Wu, J. Rodriguez, M. a. Pérez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[2] F. Z. Peng, W. Qian, and D. Cao, “Recent advances in multilevel converter / inverter topologies and applications,” in Proc. IPEC, 2010, pp. 492–501.

[3] F. Z. Peng, “A generalized multilevel inverter topology with self voltage balancing,” IEEE Trans. Ind. Electron., vol. 37, no. 2, pp. 611–618, Feb. 2001.

[4] J. Rodriguez, Jih-Sheng Lai, and Fang Zheng Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Apr. 2002.

[5] L. M. Tolbert, “A Multilevel Modular Capacitor Clamped DC-DC Converter,” in Proc. 41st IAS, 2006, pp. 966–973.

High-performance multilevel inverter drive of brushless DC Motor

ABSTRACT:

The brushless DC (BLDC) motor has numerous applications in high-power systems; it is simple in construction, is cheap, requires less maintenance, has higher efficiency, and has high power in the output unit. The BLDC motor is driven by an inverter. This paper presents design and simulation for a three-phase three-level inverter to drive the BLDC motor. The multilevel inverter is driven by discrete three-phase pulse width modulation (DPWM) generator that forced-commuted the IGBT’s three-level converters using three bridges to vectored outputs 12- pulses with three levels. Using DPWM with a three-level inverter solves the problem of harmonic distortions and low electromagnetic interference. This topology can attract attention in high-power and high-performance voltage applications. It provides a three-phase voltage source with amplitude, phase, and frequency that are controllable. The proposed model is used with the PID controller to follow the reference speed signal designed by variable steps. The system design is simulated by using Matlab/Simulink. Satisfactory results and high performance of the control with steady state and transient response are obtained. The results of the proposed model are compared with the variable DC-link control. The results of the proposed model are more stable and reliable.

KEYWORDS:

  1. Brushless DC Motor
  2. Multilevel Inverter
  3. High-Performance Drive
  4. Pulse Width Modulation (PWM)
  5. Maltlab
  6. Simulink

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Figure 1. BLDC motor with MLI driven with PID controller.

EXPECTED SIMULATION RESULTS:

 

 Figure. 2. Output of three-phase three-level inverter with DPWM.

Figure 3. The sample from output of the DPWM

Figure 4. Analysis of response for the proposed MLI with PID controller of BLDC motor.

Fig. 5. Two outputs of controllers with proposed MLI and variable DC-link

CONCLUSION:

The proposed MLI performance analysis was successfully presented by using Matlab/Simulink software. The proposed topology can be easily extended to a higher-level inverter. The simulation results were sine waves and exhibited fewer ripples and low losses. This system would show its feasibility in practice. The vector control was described in adequate detail and was implemented with a three-level MLI. This method enabled the operation of the drive at zero direct axis stator current. Transient results were obtained when a DPWM was started from a standstill to a required speed. The performance of the vector control in achieving a fast reversal of PDPWM even at very high speed ranges is quite satisfactory. The performance of the proposed three-phase MLI was investigated and was found to be quite satisfactory. A comparison was made between the PID controller–based proposed model MLI and the controller with variable DC-link voltage. The results showed that the proposed model responded better in transient and steady states and was more reliability with high performance.

REFERENCES:

[1] P. D. Kiran, M. Ramachandra, “Two-Level and Five-Level Inverter Fed BLDC Motor Drives”, International Journal of Electrical and Electronics Engineering Research, Vol. 3, Issue 3, pp 71-82, Aug 2013

[2] N. Karthika, A. Sangari, R. Umamaheswari , “Performance Analysis of Multi Level Inverter with DC Link Switches for Renewable Energy Resources”, International Journal of Innovative Technology and Exploring Engineering, Volume-2, Issue-6, pp 171-176, May 2013

[3] A. Jalilvand R. Noroozian M. Darabian, “Modeling and Control Of Multi-Level Inverter for Three-Phase Grid-Connected Photovoltaic Sources”, International Journal on Technical and Physical Problems of Engineering, Iss. 15, Vol. 5, No.2, pp 35-43, June 2013

[4] P. Karuppanan, K. Mahapatra, “PI, PID and Fuzzy Logic Controlled Cascaded Voltage Source Inverter Based Active Filter For Power Line Conditioners”, Wseas Transactions On Power Systems, Issue 4, Volume 6, pp 100-109, October 2011

[5] D. Balakrishnan, D. Shanmugam, K.Indiradevi, “Modified Multilevel Inverter Topology for Grid Connected PV Systems”, American Journal of Engineering Research, Vol. 02, Iss.10, pp-378-384, 2013