Thermal Stresses Relief Carrier-Based PWM Strategy for Single Phase Multilevel Inverters

ABSTRACT

Enhancing power cycling capability of power semiconductor devices is highly demanded in order to increase the long term reliability of multilevel inverters. Ageing of power switches and their cooling systems leads to their accelerated damage due to excess power losses and junction temperatures. Therefore, thermal stresses relief (TSR) is the most effective solution for lifetime extension of power semiconductor devices. This paper presents a new thermal stresses relief carrier-based pulse width modulation (TSRPWM) strategy for extending the lifetime of semiconductor switches in single-phase multilevel inverters. The proposed strategy benefits the inherent redundancy among switching states in multilevel inverters to optimally relieve the thermally stressed device. The proposed algorithm maintains the inverter operation without increased stresses on healthy switches and without reduction of the output power ratings. In addition, the proposed algorithm preserves voltage balance of the DC-link capacitors. The proposed strategy is validated on single phase five level T-type inverter system with considering different locations of thermal stresses detection. Experimental prototype of the selected case study is built to verify the results. Moreover, comparisons with the most featured strategies in literature are given in detail.

KEYWORDS

  1. Lifetime extension
  2. long term reliability
  3. multilevel inverter
  4. pulse width modulation (PWM)
  5. thermal stresses relief

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM

 Fig. 1. A schematic diagram of PWM controlled full bridge n-level T-type inverter

EXPECTED SIMULATION RESULTS

 Fig. 2. Simulation results of the proposed strategy at TSD in SA11 at mi=0.85.

 

 Fig. 3. Simulation results of the proposed strategy at TSD in SA11 at mi=0.45.

Fig. 4. Simulation results of the proposed TSRPWM strategy at TSD in SA12 and mi=0.85.

CONCLUSION

This paper has proposed a new carrier-based modulation strategy, called TSRPWM, for single phase multilevel inverters. It retains the same benefits as the conventional carrier PWM methods, i.e., a simple and easy implementation, but presents a significantly reduced power losses and thermal stresses of the stressed semiconductor devices. The main idea of the new proposed strategy is adaptively selecting the redundant switching states in each switching cycle, in order to optimize power losses through the thermally-stressed device. Therefore, both of the junction temperature and temperature cycling of the stressed device are reduced by the proposed strategy compared with normal mode operation of the device. The results of simulation and experimental prototypes are conformed and verified the new proposed concept. A generalized implementation of the proposed TSRPWM, to provide thermal stresses relief for any of the components and for any n-level inverters, is also presented. Moreover, the proposed strategy maintains the inverter operation with the same output ratings, and voltage balance over DC-link capacitors. Finally, the performance of the proposed strategy is compared with the prominent strategies in literature, and the distinction of the proposed strategy has become clear.

REFERENCES

[1] Shaoyong Yang, A. Bryant, P. Mawby, Dawei Xiang, Li Ran, and P. Tavner, “An industry-based survey of reliability in power electronic converters,” IEEE Trans. Ind. Appl., vol. 47, no. 3, pp. 1441–1451, May 2011.

[2] S. E. De Leon-Aldaco, H. Calleja, and J. Aguayo Alquicira, “Reliability and mission profiles of photovoltaic systems: a FIDES approach,” IEEE Trans. Power Electron., vol. 30, no. 5, pp. 2578–2586, May 2015.

[3] B. Ji, X. Song, E. Sciberras, W. Cao, Y. Hu,0 and V. Pickert, “Multiobjective design optimization of IGBT power modules considering power cycling and thermal cycling,” IEEE Trans. Power Electron., vol. 30, no. 5, pp. 2493–2504, May 2015.

[4] U.-M. Choi, F. Blaabjerg, and K.-B. Lee, “Study and handling methods of power IGBT module failures in power electronic converter systems,” IEEE Trans. Power Electron., vol. 30, no. 5, pp. 2517–2533, May 2015.

[5] P. A. Mawby, W. Lai, H. Qin, O. Alatise, S. Xu, M. Chen, and L. Ran, “Study on the lifetime characteristics of power modules under power cycling conditions,” IET Power Electron., vol. 9, no. 5, pp. 1045–1052, Apr. 2016.

Single Phase Series Active Power Filter Based on 15-Level Cascaded Inverter Topology

ABSTRACT:

A topology of series active power filter (SAPF) based on a single phase half-bridge cascaded multilevel inverter is proposed to compensate voltage harmonics of the load connected to the point of common coupling (PCC). The main parts of the inverter are presented in detail. Any voltage reference can be easily obtained by a simple control with the proposed inverter. Therefore, the inverter acts as a harmonic source when the reference is a non-sinusoidal signal. A prototype of 15-level inverter based SAPF is manufactured without using a parallel passive filter (PPF) as it is intended to represent the compensation capability of the SAPF by itself. The load connected to PCC whose voltage is non-sinusoidal is filtered both in simulation and experimental studies. The validity of the proposed inverter based SAPF is verified by simulation as well as experimental study. Both simulation and experimental results show that the proposed multilevel inverter is suitable for SAPF applications.

KEYWORDS:

  1. Active power filter
  2. Multilevel inverter
  3. Harmonic compensation
  4. Half-bridge cascaded
  5. Power quality

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Figure 1. The basic configuration of the proposed system.

EXPECTED SIMULATION RESULTS:

Figure 2. Simulation results – Set I a) V pcc and VhPCC before compensation (50 V Idiv), b) inverter and load voltage after compensation (50 V Idiv).

Figure 3. Simulaton results – Set 2 a) V pcc and V”pcc before compensation (50 V ldiv), b) inverter and load voltage after compensation (50 V Idiv).

CONCLUSION:

This paper proposes a single phase half-bridge cascaded multi level inverter based SAPF. The multi level inverter topology and operation principle is introduced. With the proposed topology, the number of output levels can easily be increased. Switching angles of the semiconductor devices used in the inverter are also obtained by a simple method. A SAPF with the proposed inverter topology is simulated under different harmonic distortion levels of PCC. The aim of the simulation is to compensate the load voltage harmonics connected to PCc. In addition to the simulations, the proposed SAPF prototype is designed. Using this prototype, experimental study is performed. Microchip dsPIC30F6010 is preferred as a controller in this prototype. It is a commercially available and inexpensive microcontroller. The presentable results of the proposed system are summarized as follows;

  • The THD values obtained from simulation study is similar to experimental results.
  • The results of simulation and experimental studies demonstrate the accuracy of the simulation study.
  • The THD values after compensation is reduced to 2.88% and 3.07% by using the proposed inverter based SAPF. After compensation, the waveform of load voltage is almost sinusoidal.
  • A highly distorted sinusoidal waveform with a THD value of 24.12% is compensated with the proposed inverter based SAPF and the THD value is reduced to 3.07%. This shows that the proposed inverter is suitable for SAPF applications.

Both simulation and experimental studies show the validity of the proposed inverter as a SAPF.

REFERENCES:

[1] M. 1. M. Montero, E. R. Cadaval, F. B. Gonzalez, “Comparison of control strategies for shunt active power filters in three-phase four wire systems”, IEEE Trans. Power Electron., , 22, (I), pp. 229- 236, 2007.

[2] F. Z. Peng, H. Akagi, and A. Nabae, ” A new approach to harmonic compensation in power systems-A combined system of shunt passive and series active filters,” IEEE Trans. Ind. Appl. , Vol. 26, No. 6, pp. 983- 990, Nov.lDec. 1990.

[3] Z. Wang, Q. Wang, W. Yao, and 1. Liu, “A series active power filter adopting hybrid control approach,” IEEE Trans. Power Electron. , Vol. 16, No. 3, pp. 301- 310, May 2001.

[4] H. Akagi, ‘Trends in active power line conditioners,” IEEE Trans. Power Electron. , Vol. 9, No. 3, pp. 263- 268, May 1994.

[5] M. EI-Habrouk, M. K. Darwish, and P. Mehta, “Active power filters : A review,” lEE Electr. Power Appl., Vol. 147, No. 5, pp. 403-413, Sep.2000.

An Optimized Three Phase Multilevel Inverter Topology with Separate Level and Phase Sequence Generation Part

ABSTRACT:

This manuscript presents an optimized, 3-ϕ, multilevel (MLI) inverter topology. The proposed system is derived by cascading the level generation part with the phase sequence generation part. Further, it can be operated at any required level depending upon the configuration of the level generation part. Thus, for higher level operation extra components are required at the level generation part only. Therefore, number of components required for the proposed MLI is lower than the conventional 3-ϕ MLI topologies for higher level operation. Further, the level generation part is shared by the three phases equally. This eliminates the possibility of phase unbalance. The working principle and the operation of the proposed MLI are supported with the simulation and experimental validations. Further, the proposed optimized MLI is also compared with the conventional 3-ϕ MLIs to prove its advantage.

 KEYWORDS:

  1. 3-ϕ
  2. Multilevel inverter
  3. Common mode voltage
  4. New topology

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. (a) Circuit schematic for the proposed m-level MLI. (b) Configuration of top/bottom BU.

EXPECTED SIMULATION RESULTS:

 

Fig 2. Simulation results showing the (a) line to line voltages, (b) Output voltage of top BU, (c) output voltage of bottom BU, (d) phase to neutral voltages and (e) load current waveforms of the proposed 3-ϕ MLI in symmetrical operation.

CONCLUSION:

This paper presents an optimized 3-ϕ MLI configuration with reduced number of component. The prominent features of the proposed MLI are as follows.

1) The proposed MLI configuration is built by cascading LGP and PSGP.

2) For higher level operation only switches required are at the BUs only which resides in the LGP. This reduces the requirement of extra devices compared to conventional topologies.

3) Also, each dc voltage source in the presented MLI topology is equally shared by all the phases. Thus, any chance of inter-phase asymmetry is avoided.

The abovementioned points support that the proposed MLI is an optimized configuration for 3-ϕ operation with reduced number of switches. However, the proposed configuration is operated by using the SVs up-to the red line only. The further work with an improved PWM strategy which takes all the SVs in account, will be presented in the regular paper. This will further increase the number of levels at the output and linearity can be maintained in over-modulation region with improved dc-bus utilization.

REFERENCES:

[1] J. Rodriguez, J. Lai and F. Z. Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” IEEE Trans. Ind. Elect., vol. 49, no. 4, pp. 724-738, Aug. 2002.

[2] K. K. Gupta, A. Ranjan, P. Bhatnagar, L. K. Sahu and S. Jain, “Multilevel Inverter Topologies With Reduced Device Count: A Review,” IEEE Trans. Power Elect., vol. 31, no. 1, pp. 135-151, Jan. 2016.

[3] Wu, Bin, and Mehdi Narimani. High-power converters and AC drives. John Wiley & Sons, 2016.

[4] S. S. Fazel, S. Bernet, D. Krug and K. Jalili, “Design and Comparison of 4-kV Neutral-Point-Clamped, Flying-Capacitor, and Series-Connected H-Bridge Multilevel Converters,” IEEE Trans. Ind. Appl., vol. 43, no. 4, pp. 1032-1040, July-aug. 2007.

[5] L. Wang, D. Zhang, Y. Wang, B. Wu and H. S. Athab, “Power and Voltage Balance Control of a Novel Three-Phase Solid-State Transformer Using Multilevel Cascaded H-Bridge Inverters for Microgrid Applications,” in IEEE Trans. Power Elect., vol. 31, no. 4, pp. 3289-3301, April 2016.

 

A Novel 7-Level Cascaded Inverter for Series Active Power Filter

ABSTRACT:

Harmonic voltage compensation of the load connected to the point of common coupling (PCC) by using a series of active power filter (SAPF) based on a single phase cascaded multilevel inverter is proposed. The proposed multilevel inverter are presented in detail. The inverter has the ability of acting as a harmonic source when the reference is a non-sinusoidal signal. To achieve this, a simple control technique is performed with the proposed inverter. A prototype of 7-level inverter based SAPF is manufactured without using a parallel passive filter (PPF) because it is designed to show SAPF own compensation capacity alone. Filtering ability of the SAPF is shown both in simulation and experimental studies. The validity of the proposed inverter based SAPF is verified by simulation as well as experimental study. The results show that the proposed multi-level inverter is suitable for SAPF applications.

KEYWORDS:

  1. Active power filter
  2. Multilevel inverter
  3. Harmonic compensation
  4. Half-bridge cascaded
  5. Power quality

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. The scheme of the proposed system.

EXPECTED SIMULATION RESULTS:

 

 (a) Simulation result (50 V/div), (5 ms/div)

Fig. 2. The waveform of VPCC before compensation

(a) Simulation result (50 V/div), (5 ms/div)

Fig. 3. The waveforms of the load voltage and the proposed inverter voltage after compensation.

 CONCLUSION:

This paper proposes a single phase cascaded inverter based SAPF. The 7-level inverter topology and operation principle is introduced. With the proposed topology, the number of output levels can easily be increased. Switching signals of the semiconductor devices used in the inverter are also obtained by a simple method. A SAPF with the proposed inverter topology is simulated.The aim of the simulation is to compensate the load voltage harmonics connected to PCC. In addition to the simulation, the proposed SAPF prototype is designed. Using this prototype, experimental study is performed. Simulation and experimental results similar each other proves the accuracy of the analysis. The load waveform that is highly distorted with a THD value of 24.12% is compensated with the proposed inverter based SAPF and the THD value is reduced to 3.80% in experimental study. This shows that the proposed inverter is suitable for SAPF applications.

REFERENCES:

[1] M. I. M. Montero, E. R. Cadaval, F. B. Gonzalez, “Comparison of control strategies for shunt active power filters in three-phase four-wire systems”, IEEE Trans. Power Electron., vol. 22, no. 1, pp. 229–236, 2007.

[2] F. Z. Peng, H. Akagi, and A. Nabae, “A new approach to harmonic compensation in power systems—A combined system of shunt passive and series active filters,” IEEE Trans. Ind. Appl., vol. 26, no. 6, pp. 983– 990, Nov./Dec. 1990.

[3] Z. Wang, Q. Wang, W. Yao, and J. Liu, “A series active power filter adopting hybrid control approach,” IEEE Trans. Power Electron., vol. 16, no. 3, pp. 301–310, May 2001.

[4] H. Akagi, “Trends in active power line conditioners,” IEEE Trans. Power Electron., vol. 9, no. 3, pp. 263–268, May 1994.

[5] M. El-Habrouk, M. K. Darwish, and P. Mehta, “Active power filters: A review,” IEE Electr. Power Appl., vol. 147, no. 5, pp. 403–413, Sep. 2000.

A New Six-Switch Five-Level Active Neutral Point Clamped Inverter for PV Applications

ABSTRACT:

Multilevel inverters are one of the preferred solutions for medium-voltage and high-power applications and have found successful industrial applications. Five-level Active Neutral Point Clamped inverter (5L-ANPC) is one of the most popular topologies among five-level inverters. A Six-Switch 5L-ANPC (6S-5L-ANPC) topology is proposed. Compared to the conventional 5L-ANPC inverters, the 6S-5L-ANPC reduces two active switches and has lower conduction loss. The proposed modulation enables the 6S-5L-ANPC inverter to operate under both active and reactive power conditions. The FC capacitance is designed under both active and reactive power conditions. The analysis shows the proposed topology is suitable for photovoltaic (PV) grid-connected applications. A 1KVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method.

KEYWORDS:

  1. Multilevel inverter
  2. Active Neutral Point Clamped (ANPC)
  3. Flying-Capacitor (FC)
  4. PWM modulation

SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

 

Fig.1. Configuration of the proposed 6S-5L-ANPC inverter.

EXPECTED SIMULATION RESULTS

 

Fig. 2. Simulation results with 310 uF FC value under unity power factor condition. (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current. (d) THD of output current.

 

Fig. 3. Simulation results with 310 uF FC value under reactive power operation (PF = 0.9). (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current. (d) THD of output current.

Fig. 4. Simulation results with 56 uF FC value under unity power factor condition. (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current. (d) THD of output current.

Fig. 5. Simulation results with 56 uF FC value under reactive power operation (PF = 0.9). (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current. (d) THD of output current.

Fig. 6. Simulation results under low switching frequency operation (PF = 1). (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current.

Fig. 7. Simulation results under low switching frequency operation (PF = 0.9). (a) Inverter output voltage. (b) FC voltage. (c) Grid voltage and inverter output current.

Fig. 8. Simulation results with 15% FC voltage drop using different FC value.

CONCLUSION:

In this paper, a novel 6S-5L-ANPC inverter topology has been proposed. As compared with the conventional 5L-ANPC inverter, it requires only 6 switches for single phase, a reduction from 8 switches. The operating principles and switching states are presented. The results of comparison between 6S-5L-ANPC and the conventional 5L-ANPC topologies show that 6S-5L-ANPC topology has lower conduction loss and thus higher efficiency in high power condition. The specific modulation strategy of 6S-5L-ANPC inverter under reactive power operation has been proposed. Issues related to the DC-link capacitors and FC voltages balancing and the maximum reactive power capability are discussed. The equations to calculate the FC capacitance value in active and reactive power conditions are provided. Computer simulation and experimental prototype based on a single phase 1KVA prototype have been carried out in both active and reactive power conditions to demonstrate the reliability of the proposed topology and modulation method.

REFERENCES:

[1] F. Z. Peng, W. Qian, and D. Cao, “Recent advances in multilevel converter / inverter topologies and applications,” in Proc. IPEC, 2010, pp. 492–501.

[2] J. Rodriguez, Jih-Sheng Lai, and Fang Zheng Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Apr. 2002.

[3] A. Sanchez-ruiz, M. Mazuela, S. Alvarez, G. Abad, and I. Baraia, “Medium voltage–high power converter topologies comparison procedure, for a 6.6 kV drive application using 4.5 kV IGBT modules,” IEEE Trans. Ind. Electron., vol. 59, no. 3, pp. 1462–1476, Mar. 2012.

[4] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. W. Bin Wu, J. Rodriguez, M. a. Pérez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[5] J. Rodríguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Ind. Electron. Mag., vol. 2, no. 2, pp. 28–39, Jun. 2008.

A Seven-Switch Five-Level Active-Neutral-Point-Clamped Converter and Its Optimal Modulation Strategy

ABSTRACT:

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium and high power applications. As one of the most popular hybrid multilevel inverter topologies, the Five-Level Active-Neutral-Point-Clamped inverter (5L-ANPC) combines the features of the conventional Flying-Capacitor (FC) type and Neutral-Point-Clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a Seven-Switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1KVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method.

KEYWORDS:

  1. Multilevel inverter
  2. Active-Neutral-Point-Clamped (ANPC) inverter
  3. Flying-Capacitor
  4. Pulse-Width-Modulation (PWM)

 SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

 

Fig.1 (a) Proposed topology.

 EXPECTED SIMULATION RESULTS

 

 Fig. 2. Simulation results under unity power factor condition. (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4.

Fig. 3. Simulation results under reactive power condition (PF = 0.9, capacitive). (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4

Fig. 4. Simulation results under reactive power condition (PF = 0). (a) Output voltage and FC voltage. (b) T7 current in case 1. (c) T7 current in case 2. (d) T7 current in case 3. (e) T7 current in case 4.

Fig. 5. Experimental results under unity power factor condition: waveforms of inverter output voltage, grid voltage, FC voltage and output current.

CONCLUSION:

In this paper, a novel 7S-5L-ANPC inverter topology has been proposed. As compared with the conventional 5L-ANPC inverter, it requires seven active switches for single phase and a low current rating switch can be selected for the seventh switch under high power factor situation. The operating principles and switching states are presented. The detailed comparison between the proposed topology and the conventional 5L-ANPC topologies in terms of voltage stress and efficiency is made. The specific modulation strategy of 7S-5L-ANPC inverter under reactive power operation has been proposed. Computer simulation and experimental prototype based on a single phase 1KVA prototype have been carried out in unity power factor condition and reactive power condition. The validity and advantages of the proposed topology and modulation method are demonstrated.

REFERENCES:

[1] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. W. Bin Wu, J. Rodriguez, M. a. Pérez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.

[2] F. Z. Peng, W. Qian, and D. Cao, “Recent advances in multilevel converter / inverter topologies and applications,” in Proc. IPEC, 2010, pp. 492–501.

[3] F. Z. Peng, “A generalized multilevel inverter topology with self voltage balancing,” IEEE Trans. Ind. Electron., vol. 37, no. 2, pp. 611–618, Feb. 2001.

[4] J. Rodriguez, Jih-Sheng Lai, and Fang Zheng Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Apr. 2002.

[5] L. M. Tolbert, “A Multilevel Modular Capacitor Clamped DC-DC Converter,” in Proc. 41st IAS, 2006, pp. 966–973.

Verification of a low Components Nine-Level Cascaded-Transformer Multilevel Inverter in Grid- Tie Mode

ABSTRACT:

The main problem related to cascaded H-bridge cells multilevel inverters (CHBs) is their using of a large number of components, such as switches and DC-sources. Therefore, minimization of components in these kinds of devices is of great importance. Cascaded transformers multilevel inverters (CTMIs) have completely eliminated the need for several DC-sources in CHBs. Thus, minimization of the other components in CTMIs can lead to obtain an optimized structure for multilevel inverters. The present paper introduces a simple and compact structure for transformer based multilevel inverters. Since the number of utilized components in the proposed structure is remarkably reduced, the cost, volume and complexity are minimized. The performance of the suggested inverter has been scrutinized through two different strategies. Firstly, it is tested under condition of supplying a local load, and secondly, employing sample based current control strategy, its performance is inspected when being connected to the grid. In the latter test the leakage inductances of the transformers are utilized to execute the sample based current control strategy, thus, the need for extra filter is eradicated. The feasibility of the suggested topology has been validated by using laboratory-built prototype along with a computer-aid simulated model.

 

KEYWORDS:

  1. Multilevel inverter
  2. Component reduction
  3. Grid-connected converter
  4. Sample based current control

SOFTWARE: MATLAB/SIMULINK

 

CIRCUIT DIAGRAM:

Fig. 1. Proposed topology

 EXPECTED SIMULATION RESULTS

 Fig. 2. Simulation results of the output voltage, load current, FFT analyses, and switches voltages & currents. (a) Output voltage in no load condition, (b) output voltage and load current when supplying the RL load (c) output voltage and load current when supplying the pure resistive load. (d) FFT analysis of the output voltage in no load condition. (e) FFT analysis of the output voltage when supplying the RL load. (f) FFT analysis of the output voltage when supplying the pure resistive load. (g) Voltages and currents of the switches of the two outer legs. (h) Voltages and currents of the switches of the two middle legs. (j) Load and capacitor currents when providing active an reactive power (resistive-inductive loading condition).

Fig.3. Simulation results of grid-tied model. (a) Reference current and injected current. (b) Injected current  and grid voltage. (c) FFT analysis of the injected current

 

CONCLUSION:

This paper put forth a novel nine-level topology for transformer based multilevel inverters. The proposed topology can deservedly reduce switches count of a nine-level single-phase multilevel inverter. To prove the feasibility of the suggested topology, by using a model simulated under Mathlab/Simulink environment and a laboratory-built prototype, it went under two different tests. Firstly, its performance was assessed when supplying a local load. The load was assumed to be either a pure resistive load or a resistive-inductive load. Secondly, employing sample based current control strategy, its performance was inspected under grid-tied condition. By employing a simulated model in the latter test, the proposed topology took the responsibility of delivering an assumed active power of 15kW, and 25kW to the grid. In the experimental test the power value injected to the grid was considered to be 800w. Since the CTMIs mostly use only one DC-source they are a competent candidate in microgrid and PV application. Being based on CTMIs, the proposed topology employs fewer numbers of components and offers the same advantages as the conventional topology does. When adopting the sample based current control strategy in grid-tie applications an inductive element is required to be located between the converter and the grid. In this paper the leakage inductances of the transformers were used as the inductive filter. This facilitated executing the sample based current control strategy and consequently the need for an extra filter is eradicated. The other advantage of using transformers was their providing a galvanic isolation. To sum up, the accomplished tests verified the feasibility and viability of the suggested topology.

 

REFERENCES:

  • Z. Peng, J.W McKeever, D.J. Adams,―A power line conditioner using cascade multilevel inverters for distribution systems,‖ IEEE Trans. Ind. Appl., Vol. 34, no. 6, pp. 1293 – 1298, nov. 1998.
  • M. Tolbert, F. Z. Peng, T.G. Habetler, ―Multilevel converters for large electric drives‖. IEEE Trans. Ind. Appl, Vol. 35, no. 1, pp. 36-44, Aug. 1999.
  • Dixon, J. Pereda, C. Castillo, S. Bosch, ―Asymmetrical multilevel inverter for traction drives using only one DC supply,‖ IEEE Trans Veh, Techno, Vol. 59, no. 8, pp. 3736-3743, Oct. 2010.
  • Poompavai, A. Chitra, C. Srinivas, K. Giridharan, ―A meticulous analysis of induction motor drive fed from a nine-level Cascade H-Bridge inverter with level shifted multi carrier PWM,‖ in Proc. IEEE Int. Conf. on Smart Structures and Systems (ICSSS), 2013, pp 6-12.
  • Suresh, A.K. Panda, ―Research on a cascaded multilevel inverter by employing three-phase transformers,‖ IET Power Electron, Vol. 5, no. 5, pp. 561 – 570, Jun. 2012.

 

Single-Phase Modified Quasi-Z-Source Cascaded Hybrid Five-Level Inverter

ABSTRACT:

This paper proposes the combination of a novel modified quasi-Z-source (MqZS) inverter with a single-phase symmetrical hybrid three-level inverter in order to boost the inverter three-level output voltage. The proposed single-phase MqZS hybrid three-level inverter provides a higher boost ability and reduces the number of inductors in the source impedance, compared with both the single-phase three-level neural-point clamped (NPC) qZSI and the single-phase quasi-Z source cascaded multilevel inverter (CMI). Additionally, it can be extended to obtain the nine-level output voltage by cascading two three-level PWM switching cells with a separate MqZS and dc source, which herein is called a single-phase MqZS cascaded hybrid five-level inverter (MqZS-CHI). A modified modulation technique based on an alternative phase opposition disposition (APOD) scheme is suggested to effectively control the shoot-through state for boosting the dc-link voltage and balancing the two series capacitor voltages of the MqZS. The performances of both the proposed MqZS-CHI and the modulation techniques are verified through simulation and experimental results.

 

SOFTWARE: MATLAB/SIMULINK 

 

BLOCK DIAGRAM:

Fig. 1. The single-phase modified quasi-Z-source cascaded hybrid five- level inverter.

  

EXPECTED SIMULATION RESULTS:

Fig. 2 Simulation results of the proposed MqZS-CHI when M = 0.8 and D = 0.2; (a) ac output and dc-link voltages, output and dc-link voltages of cell 1 and the ac output voltage, (b) carrier signals, shoot-through signal, reference signal, two inductor currents, dc-link and capacitor voltages of cell 1.

Fig. 3. Simulation results of the proposed inverter when M = 0.7, D = 0.25: (a) switching frequency = 10 kHz, (b) switching frequency = 3 kHz.

 

CONCLUSION:

This paper proposed two novel topologies for a single-phase MqZS hybrid three-level inverter and a single-phase MqZS-CHI designed by cascading two three-level PWM switching cells in order to obtain the output voltage with nine voltage levels. Compared with both the three-level NPC qZSI and the three-level qZS-CMI, the proposed MqZS hybrid three-level inverter reduces the number of inductors by two. Its boost factor is higher by a factor of two relative to that of the NPC qZSI, although dc source current is discontinuous. The proposed topology can produce a nine-level output voltage, which only requires nine high-frequency switching devices and four low-frequency switching devices in the SPFB. However, the voltage stress across the four low-frequency switches is twice or four times higher than that of the high-frequency switches. On the other hand, the four switches in the SPFB can be implemented with the low-frequency high-voltage switching devices, and the switching loss can be reduced. Through the simulation and experimental results, the dc-link voltage of each cell is boosted by 2.8 times, and an output voltage of 155 Vrms can be obtained from a 50 V dc input voltage at the low shoot-through duty ratio as 0.2. The THD of the filtered ac output voltages with the four different voltage levels ranges from 2.49 % to 3.6 %. The proposed modulation technique offers a simple implementation, and the balance of the two series capacitor voltages of the three-level PWM switching cell can be achieved.

 

REFERENCES:

  • Z. Peng, “Z-source inverter,” IEEE Trans. Ind. Appl., vol. 39, no. 2, pp. 504–510, Mar. 2003
  • Anderson and F. Z. Peng, “A class of quasi-Z-source inverters,” in Proc. IEEE-IAS Annu. Meeting, Oct. 2008, pp.1-7.
  • P. Siwakoti, F. Z. Peng, F. Blaabjerg, P. C. Loh, and G. E. Town, “Impedance-source networks for electric power conversion part I: A topology review,” IEEE Trans. Power Electron., vol. 30, no. 2, pp. 699–716, Feb. 2015.
  • P. Siwakoti, F. Z. Peng, F. Blaabjerg, P. C. Loh, G. E. Town, and S. Wang, “Impedance-source networks for electric power conversion part II: Review of control and modulation techniques,” IEEE Trans. Power Electron., vol. 30, no. 4, pp. 1887–1906, Apr. 2015.
  • Ellabban and H. Abu-Rub, “Z-source inverter – Topology improvement review,” IEEE Ind. Electron. Magazine, pp. 6-24, Mar. 2016.

Multi-Input Switched-Capacitor Multilevel Inverter for High-Frequency AC Power Distribution

ABSTRACT:

This paper proposes a switched-capacitor multilevel inverter for high frequency AC power distribution systems. The proposed topology produces a staircase waveform with higher number of output levels employing fewer components compared to several existing switched capacitor multilevel inverters in the literature. This topology is beneficial where asymmetric DC voltage sources are available e.g. in case of renewable energy farms based AC microgrids and modern electric vehicles. Utilizing the available DC sources as inputs for a single inverter solves the major problem of connecting several inverters in parallel. Additionally, the need to stack voltage sources, like batteries or super-capacitors, in series which demand charge equalization algorithms, are eliminated as the voltage  sources employed share a common ground. The inverter inherently solves the problem of capacitor voltage balancing as each capacitor is charged to the value equal to one of input voltage every cycle. State analysis, losses and the selection of capacitance are examined. Simulation and experimental results at different distribution frequencies, power levels and output harmonic content are provided to demonstrate the feasibility of the proposed multilevel inverter topology.

KEYWORDS:

  1. H-bridge
  2. HFAC power distribution
  3. High frequency DC/AC Inverter
  4. Multilevel inverter
  5. Selective harmonic elimination
  6. Switched-capacitor

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1: Proposed 7 level SCMLI topology

EXPECTED SIMULATION RESULTS

Fig. 2: Simulation waveforms at 400 Hz including nonidealities : (a) output voltage and current (b) switched capacitor voltage and current

CONCLUSION:

A novel SCMLI topology for HFAC PDS has been proposed in this paper. The topology is applicable where unequal DC input sources are at disposal. Such scenarios are common in large renewable energy farms and electric vehicle networks. It is more convenient to employ multiple DC sources as input to a single inverter than to employ several inverters in parallel with their respective solitary DC input sources. This topology does not stack up the voltage sources in series and therefore does not require voltage balancing circuits. Since the switched capacitors employed copy the input voltage every cycle, the problem of voltage balancing has also been eliminated. The harmonic content in the waveform is analyzed and is found to be minimum. The proposed topology obtains higher number of voltage levels compared to several existing topologies. This paper utilizes the proposed topology for high frequency AC distribution. However, the same topology can be employed for 50 Hz / 60 Hz distribution by employing a larger switched capacitor. It is shown that the number of output voltage levels exponentially increase with increase in the employed input voltage sources and SCs. In the hardware results, it is shown that the 5th and 7th harmonics are minimized to very low value of 1V each. Results at different distribution frequencies and power levels are presented.

REFERENCES:

[1] Patel, Mukund R.,“High-Power High-Voltage Systems”, Spacecraft Power Systems, CRC press, 2004, ch. 22, sec. 22.7, pp. 539-543.

[2] Luk, Patrick Chi-Kwong, and Andy Seng Yim Ng. ”High Frequency AC Power Distribution Platforms.” Power Electronics in Smart Electrical Energy Networks. Springer London, 2008. pp. 175-201.

[3] Z. Ye, P. K. Jain and P. C. Sen, ”A Two-Stage Resonant Inverter With Control of the Phase Angle and Magnitude of the Output Voltage,” in IEEE Trans. Ind. Electron., vol. 54, no. 5, pp. 2797-2812, Oct. 2007.

[4] J. A. Sabate, M. M. Jovanovic, F. C. Lee and R. T. Gean, ”Analysis and design-optimization of LCC resonant inverter for high-frequency AC distributed power system,” in IEEE Trans. Ind. Electron., vol. 42, no. 1,pp. 63-71, Feb 1995.

[5] Status of 20 kHz Space Station Power Distribution Technology, NASA Publication, TM 100781.

Combination Analysis and Switching Method of a Cascaded H-Bridge Multilevel Inverter Based on Transformers With the Different Turns Ratio for Increasing the Voltage Level

ABSTRACT:

This paper analyzes the combination in a cascaded H-bridge multilevel inverter (CHBI) based on transformers with the different turn ratios for increasing the voltage level and proposes the switching method for achieving the output voltage distribution among H-bridge cells (HBCs). The transformers used in this paper are connected to the output of the respective HBCs, and the secondary sides of all the transformers are connected in series for generating the final output voltage. Only one of the transformers, in particular, has a different turn ratio for increasing the output voltage level. In this paper, the possible turn ratio of the special transformer with a different turn ratio is discussed in detail, and a switching method based on the level-shifted switching method for the topology used in this paper is proposed. To verify the effectiveness of the proposed method, a three-phase 21-level CHBI is experimentally tested.

KEYWORDS:

  1. Cascaded H-bridge inverter (CHBI)
  2. Cascaded multilevel
  3. Level-shifted switching method
  4. Multilevel inverter

 SOFTWARE: MATLAB/SIMULINK

 CIRCUIT DIAGRAM:

Fig. 1. Transformer-based CHBI topology used in this paper.

EXPECTED SIMULATION RESULTS

 

Fig. 2. Simulation results of the proposed switching method with the

balanced voltage distribution at Mi = 1.

Fig. 3. Simulation results of the proposed switching method atMi =1. (a) With and (b) without the balanced voltage and power distributions.

CONCLUSION:

Transformer-based CHBI topology was introduced in this paper. The comparison analysis between topologies was shown in Table XI. The theoretical analysis regarding the selection of the turns ratio of the subtransformer was presented. In addition, a switching method based on the level-shifted switching method with the balanced voltage and power distributions was proposed for the transformer-based CHBI topology. Several requirements related to the decision of switching devices and the design of transformer were suggested.A21-level CHBIwas used to determine the feasibility and effectiveness of the proposed switching method.

When using the proposed switching method, two issues are to be noted: 1) to use the proposed switching method, the configuration of transformer-based CHBI topology should follow that of Table II. It guarantees that the minimum variation (dVx ) of the voltage level is always the same. 2) If the system operates in the wide voltage range (wideMi ), Table VII should be changed as that explained in this paper to guarantee a balanced voltage distribution for Mi range required. Table VI guarantees a balanced voltage distribution for 0.8<Mi < 1. Consequently, this configuration can be applied for the main power supply system generating the ac voltage in grid.

REFERENCES:

[1] J. Rodr´ıguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multilevel voltage-source-converter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945, Dec. 2007.

[2] J. S. Lee and K. B. Lee, “New modulation techniques for a leakage current reduction and a neutral-point voltage balance in transformerless photovoltaic systems using a three-level inverter,” IEEE Trans. Power Electron., vol. 29, no. 4, pp. 1720–1732, Apr. 2014.

[3] C. H. Ng, M. A. Parker, L. Ran, P. J. Tavner, J. R. Bumby, and E. Spooner, “A multilevel modular converter for a large, light weight wind turbine generator,” IEEE Trans. Power Electron., vol. 23, no. 3, pp. 1062–1074, May 2008.

[4] V.Yaramasu and B.Wu, “Predictive control of a three-level boost converter and an NPC inverter for high-power PMSG-based medium voltage wind energy conversion systems,” IEEE Trans. Power Electron., vol. 29, no. 10, pp. 5308–5322, Oct. 2014.

[5] J. Mei, B. Xiao, K. Shen, L. M. Tolbert, and J. Y. Zheng, “Modular multilevel inverter with new modulation method and its application to photovoltaic grid-connected generator,” IEEE Trans. Power Electron., vol. 28, no. 11, pp. 5063–5073, Nov. 2013.