Power Quality Enhancement in Residential Smart Grids through Power Factor Correction Stages

Power Quality Enhancement titles

ABSTRACT:

The proliferation of non-linear loads and the increasing penetration of Distributed Energy Resources (D ER) in Medium-Voltage (M V) and Low-Voltage (L V) distribution grids, make it more difficult to maintain the power quality levels in residential electrical grids, especially in the case of weak grids. Most household appliances contain a conventional Power Factor Corrector (PFC) rectifier, which maximizes the load Power Factor (PF) but does not contribute to the regulation of the voltage Total Harmonic Distortion (TH D V ) in residential electrical grids.

This

manuscript proposes a modification for PFC controllers by adapting the operation mode depending on the measured TH D V . As a result, the PF Cs operate either in a low current Total Harmonic Distortion (TH DI ) mode or in the conventional resistor emulator mode and contribute to the regulation of the TH D V and the PF at the distribution feeders. To prove the concept, the modification is applied to a current sensor less Non-Linear Controller (N LC) applied to a single-phase Boost rectifier. Experimental results show its performance in a PFC front-end stage operating in Continuous Conduction Mode (CC M) connected to the grid with different TH D V.

BLOCK DIAGRAM:

 

 Fig. 1. Residential L V grid with household appliances feed through conventional AC/DC stages (without the proposed operation mode selector) and the proposed P Q E controller.

 EXPECTED SIMULATION RESULTS:

 

Fig. 2. Experimental results of P Q E PFC at 50 Hz. Voltage and current wave forms in a) resistor emulator mode (k = 0), b) sinusoidal current mode (k = 1) and c) measured spectra in both operation modes.

Fig. 3. Experimental results of  P Q E PFC at 60 Hz. Voltage and current wave forms in a) resistor emulator mode (k = 0), b) sinusoidal current mode (k = 1) and c) measured spectra in both operation modes.

Fig. 4. Experimental results of P Q E PFC at 400 Hz. Voltage and current wave forms in a) resistor emulator mode (k = 0), b) sinusoidal current mode (k = 1) and c) measured spectra in both operation modes.

CONCLUSION:

The consequence on the electrical power quality of connecting household appliances to the grid through PFC stages has been assessed considering different TH D V scenarios. As has been shown in (17) and (23), there are conditions under which sinusoidal current consumption results in better PF at the PC C than with resistor emulator behavior, commonly assumed to be ideal for PFC stages. A modification of the carrier signal of N LC controllers applied to PFC stages is designed to impress sinusoidal input current despite the input voltage distortion. The line current estimation with no interaction with the power stage implements the N LC with high noise immunity. The digital implementation of the non-linear controller is appropriate to define the carrier and to include additional reduction of the current distortion depending on the application.

P Q E controller

The P Q E controller can be applied to mitigate the effect of nonlinear loads within household appliances on residential electrical grids. The operation mode of the digital controller can be autonomously adjusted through the locally measured TH D V , without extra circuitry. The user or a TH D V threshold detection selects the convenient behavior (either resistor emulator or pure sinusoidal current). Experimental results obtained with high TH D V (above 5 %) confirm the feasibility of the P Q E controller in both sinusoidal current and resist i v e emulator modes.

REFERENCES:

[1] IEEE Std. 519-2014 (Revision of IEEE Std. 519-1992), IEEE Recommended Practice and Requirements for Harmonic Control in Electric Power Systems, D OI 10.1109/IEEE STD.2014.6826459, pp. 1–29, Jun. 2014.

[2] Y. J. Wang, R. M. O’Connell, and G. Brownfield, “Modeling and prediction of distribution system voltage distortion caused by nonlinear residential loads,” IEEE Trans. Power Del., vol. 16, D OI 10.1109/61.956765, no. 4, pp. 744–751, Oct. 2001.

[3] H. Ora e e, “A quantitative approach to estimate the life expectancy of motor insulation systems,” IEEE Trans. Die l e ct r. Elect r. In s u l., vol. 7, D OI 10.1109/94.891990, no. 6, pp. 790–796, Dec. 2000.

[4] D. Fab i an i and G. C. Mont an a r i, “The effect of voltage distortion on ageing acceleration of insulation systems under partial discharge activity,” IEEE Elect r. Ins u l. Mag., vol. 17, D OI 10.1109/57.925300, no. 3, pp. 24–33, May. 2001.

[5] T. J. Dion i s e and V. Lo r ch, “Harmonic filter analysis and redesign for a modern steel facility with two melt furnaces using dedicated capacitor banks,” in IEEE I AS Annual Meeting, vol. 1, D OI 10.1109/I AS.2006.256496, pp. 137–143, Oct. 2006.

Performance Improvement of DVR by Control of Reduced-Rating with A Battery Energy Storage

ABSTRACT:

Performance improvement of Voltage infusion strategies for DVRs (Dynamic Voltage Restorers) and working modes are settled in this paper. Utilizing fuzzy logic control DVR with dc link& with Battery Energy Storage System frameworks are worked. Power quality issues for the most part consonant contortion, voltage swell and droop are diminished with DVR utilizing Synchronous Reference Theory (SRF hypothesis) with the assistance of fuzzificaton waveforms are watched.

 

 BLOCK DIAGRAM:

 Fig.1.Block Diagram of DVR

 EXPECTED SIMULATION RESULTS:

Fig.2 Voltage waveforms at common coupling point (PCC) and load during harmonic distortion

Fig.3. the dc voltage injection from Battery energy Storage System connected DVR system at voltage swelling period

 Fig.4. DVR waveforms during voltage sag at time of voltage in phase injection

 Fig.5 Amplitude of load voltages and PCC voltages w.r.t time

 Fig 6.DVR waveforms during harmonic distortion at the time of voltage in phase injection

CONCLUSION:

By applying distinctive voltage infusion conspires the job of DVR has been appeared with a most recent control strategy. The introduction of DVR has been offset with different plans with a decreased rating VSC. For gaining the power of DVR, the reference stack voltages have been resolved with the assistance of unit vectors, for which the blunder of voltage addition is diminished. By utilizing SRF hypothesis the reference DVR voltages have been resolved. At last, the outcome inferred are that the in stage voltage addition with PCC voltage diminishes the DVR rating and yet at its DC transport the vitality source is squandered. battery energy storage system. Performance Improvement of DVR by Control of Reduced-Rating with A Battery Energy Storage.

 

Modelling and analysis of modular multilevel converter for solar photovoltaic applications to improve power quality

ABSTRACT:

The design of control circuit for a solar fed cascaded multilevel inverter to reduce the number of semiconductor switches is presented in this study. The design includes ‘binary’, ‘trinary’ and ‘modified multilevel connection’ (MMC)-based topologies suitable for varying input sources from solar photovoltaic’s (PV). In binary mode, 2Ns +1 − 1 output voltage levels are obtained where Ns is the number of individual inverters. This is achieved by digital logic functions which includes counters, flip-flops and logic gates. In trinary mode, 3Ns levels are achieved by corresponding look-up table. MMC intends design in both control and power circuits to provide corresponding output voltage levels by appropriate switching sequences. Hence to obtain a 15-level inverter, the conventional method requires 28 switches and in binary mode 12 switches are needed. In trinary mode with the same 12 switches, 27 levels can be obtained whereas in MMC only 7 switches are employed to achieve 15 levels. The advantage of these three designs is in the reduction of total harmonic distortion by increasing the levels. Simulations are carried out in MATLAB/Simulink and comparisons were made. All the three topologies are experimentally investigated for a 3 kWp solar PV plant and power quality indices were measured.

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

 

 Fig.1 Single stage 15-level inverter power circuit

EXPECTED SIMULATION RESULTS:

 

Fig. 2 Solar PV with partial shaded condition for a 15-level CMLI

a Variation of panel irradiance

b 15-level output voltage waveform

Fig. 3 15-level output voltage waveform achieved from three stage inverter

a 15-level output voltage waveform

b FFT analysis for three stage 15-level CMLI

Fig. 4 Output voltage waveform and its corresponding harmonic spectrum

a 27-level output voltage waveform

b FFT analysis for three stage 27-level CMLI

 

Fig. 5 Output voltage waveform and its corresponding harmonic spectrum

a 15-level output voltage waveform

b FFT analysis for one stage 15-level CMLI

CONCLUSION:

The power quality improvement for a solar fed CMLI with reduced number of semiconductor switches is investigated in this paper. The required 15-level output is achieved with only 12 switches in binary mode and 7 switches in MMC mode. In addition, 27-level output is obtained with 12 switches through trinary mode. The mathematical model for solar PV is carried out which is considered as the input to the inverter stages. A detailed simulation study is carried out for various levels and comparison has been made. A 3 kWp solar PV fed CMLI is implemented for all the three topologies and harmonics analysis was made. Based on the observations, the proposed method provides the multiple advantages which include reduced THD, less cost, simple design, minimum computational complexity and the absence of transformers, boost converters, detailed look-up table and filter circuit. Moreover, these methods are much suitable for standalone/grid interacted PV systems to improve power quality.

REFERENCES:

1 Rahim, N.A., Selvaraj, J.: ‘Multistring five-level inverter with novel PWM control scheme for PV application’, IEEE Trans. Ind. Electron., 2010, 57, (6), pp. 2111–2123

2 Selvaraj, J., Rahim, N.A.: ‘Multilevel inverter for grid-connected PV system employing digital PI controller’, IEEE Trans. Ind. Electron., 2009, 56, (1), pp. 149–158

3 Rahim, N.A., Chaniago, K., Selvaraj, J.: ‘Single-phase seven-level grid-connected inverter for photovoltaic system’, IEEE Trans. Ind. Electron., 2011, 58, (6), pp. 2435–2443

4 Barbosa, P.G., Braga, H.A.C., do Carmo Barbosa Rodrigues, M., Teixeira, E.C.: ‘Boost current multilevel inverter and its application on single-phase grid-connected photovoltaic systems’, IEEE Trans. Power Electron., 2006, 21, (4), pp. 1116–1124

5 Villanueva, E., Correa, P., Rodríguez, J., Pacas, M.: ‘Control of a single-phase cascaded H-bridge multilevel inverter for grid-connected photovoltaic systems’, IEEE Trans. Ind. Electron., 2009, 56, (11), pp. 4399–4406

 

Design and Simulation of Single Phase Shunt Active Power Filter using MATLAB

ABSTRACT:

Power Quality issues are becoming a major concern of today’s power system engineers. Harmonics play significant roll in deteriorating power quality, called harmonic distortion. Harmonic distortion in electric distribution system is increasingly growing due to the widespread use of nonlinear loads. Large considerations of these loads have the potential to raise harmonic voltage and currents in an electrical distribution system to unacceptable high levels that can adversely affect the system. IEEE standards have defined limits for harmonic voltages and harmonic currents. Active power filters have been considered a potential candidate to bring these harmonic distortions within the IEEE limits. This paper deals with an active power filter (APF) based on simple control. A voltage source inverter with pulse width modulation (PWM) is employed to form the APF. A diode rectifier feeding capacitive-resistive load is considered as nonlinear load on ac mains for the elimination of harmonics by the proposed APF. MATLAB model of the scheme is simulated and obtained results are studied.

KEYWORDS:

  1. Power Quality
  2. THD
  3. Non-linear Load
  4. PWM

 SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Figure 1 Principle of Shunt connected SPAPF

EXPECTED SIMULATION RESULTS:

Figure 2. Load Current without SPAPF

Figure 3. Load Current Harmonic Spectrum without SPAPF

Figure 4. Load Voltage without SPAPF

Figure 5. Load Current Harmonic Spectrum without SPAPF

Figure 6. Load Current with SPAPF

Figure 7. Load Current Harmonic Spectrum with SPAPF

Figure 8. Load Voltage without SPAPF

Figure 9. Load Voltage Harmonic Spectrum with SPAPF

 CONCLUSION:

A simple control scheme of the single phase active power filter is proposed which requires sensing of one current and two voltages only. The APF results in sinusoidal unity power factor supply current. It is concluded that the reduced value of dc bus capacitor is able to give quite satisfactory operation of the APF system. The voltage controller gives fast response. The proposed APF is able to reduce THD of supply current and supply voltage below prescribed permitted limits specified by IEEE 519.

REFERENCES:

[1] D. C. Bhonsle, Dr. R. B. Kelkar and N. K. Zaveri, “Power Quality Issues-In Distribution System”, IE(I) 23rd National Convention of Electrical Engineers, Pune, November 2007 Proceedings, pp. 108-111.

[2] K. C. Umeh, A. Mohamed, R. Mohmed, “ Comparing The Harmonic Characteristics of Typical Single Phase Nonlinear Loads”, National Power Energy Conference (PECon) 2003 Proceedings, Bangi, Malaysia, pp. 383-387.

[3] Mohamed S. A. Dahidah, N. Mariun, S. Mahmod and N. Khan, “Single Phase Active Power Filter for Harmonic Mitigation in Distribution Power Lines”, National Power and Energy Conference (PECon) 2003 Proceedings, Bangi, Malaysia, pp. 359-362.

[4] Dalila Mat Said Ahmed, Abdullah asuhaimi, Mohd Zin, “Power Supply Quality Improvement: Harmonic Measurement and Simulation,” National Power and Energy Conference (PECon), 2003 Proceedings, Bangi, Malaysia, pp. 352-358.

[5] C. Gopalkrishnan, K Udaykumar, T. A. Raghvendiran, “Survey of Harmonic Distortion for Power Quality Measurement and Application of Standard including Simulation,” 2001, Anna University, India.