Fault Ride-Through of a DFIG Wind Turbine Using a Dynamic Voltage Restorer During Symmetrical and Asymmetrical Grid Faults

ABSTRACT:

 The application of a dynamic voltage restorer (DVR) connected to awind-turbine-driven doubly fed induction generator (DFIG) is investigated. The setup allows the wind turbine system an uninterruptible fault ride-through of voltage dips. The DVR can compensate the faulty line voltage, while the DFIG wind turbine can continue its nominal operation as demanded in actual grid codes. Simulation results for a 2 MW wind turbine and measurement results on a 22 kW laboratory setup are presented, especially for asymmetrical grid faults. They show the effectiveness of the DVR in comparison to the low-voltage ride-through of the DFIG using a crowbar that does not allow continuous reactive power production.

 KEYWORDS:

  1. Doubly fed induction generator (DFIG)
  2. Dynamic voltage restorer (DVR)
  3. Fault ride-through and wind energy

 SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

Fault Ride-Through of a DFIG

Fig. 1. Schematic diagram of DFIG wind turbine system with DVR.

 EXPECTED SIMULATION RESULTS:

 

Fig. 2. Simulatin of DFIG performance with crowbar protection during 37 % two-phase voltage dip. (a) Line voltage. (b) DVR voltage. (c) Stator voltage. (d) Stator current. (e) RSC current. (f) Crowbar current. (g) Mechanical speed. (h) Active and reactive stator power. (i) Active and reactive DVR power.

Fig. 3. Simulation of DFIG performance with DVR protection during 37 % two-phase voltage dip. (a) Line voltage. (b) DVR voltage. (c) Stator voltage. (d) Stator current. (e) RSC current. (f) Crowbar current. (g) Mechanical speed. (h) Active and reactive stator power. (i) Active and reactive DVR power.

Fig. 4. Measurement results for DFIG with crowbar protection: (a) stator

voltages, (b) stator currents, and (c) rotor currents.

Fig. 5. Measurement results for DFIG with DVR protection: (a) line voltages, (b) DVR voltages, (c) stator voltages, (d) stator currents, and (e) rotor currents.

CONCLUSION:

The application of a DVR connected to a wind-turbine-driven DFIG to allow uninterruptible fault ride-through of grid voltage faults is investigated. The DVR can compensate the faulty line voltage, while the DFIG wind turbine can continue its nominal operation and fulfill any grid code requirement without the need for additional protection methods. The DVR can be used to protect already installed wind turbines that do not provide sufficient fault ride-through behavior or to protect any distributed load in a microgrid. Simulation results for a 2 MW wind turbine under an asymmetrical two-phase grid fault show the effectiveness of the proposed technique in comparison to the low-voltage ridethrough of the DFIG using a crowbar where continuous reactive power production is problematic. Measurement results under transient grid voltage dips on a 22 kW laboratory setup are presented to verify the results.

REFERENCES:

[1] M. Tsili and S. Papathanassiou, “A review of grid code technical requirements for wind farms,” Renewable Power Generat., IET, vol. 3, no. 3, pp. 308–332, Sep. 2009.

[2] R. Pena, J. Clare, and G. Asher, “Doubly fed induction generator using back-to-back pwm converters and its application to variable-speed windenergy generation,” Electr. Power Appl., IEE Proc., vol. 143, no. 3, pp. 231–241, May 1996.

[3] S.Muller,M.Deicke, andR.DeDoncker, “Doubly fed induction generator systems for wind turbines,” IEEE Ind. Appl.Mag., vol. 8, no. 3, pp. 26–33, May/Jun. 2002.

[4] J. Lopez, E. Gubia, P. Sanchis, X. Roboam, and L. Marroyo, “Wind turbines based on doubly fed induction generator under asymmetrical voltage dips,” IEEE Trans. Energy Convers., vol. 23, no. 1, pp. 321–330, Mar. 2008.

[5] M. Mohseni, S. Islam, and M. Masoum, “Impacts of symmetrical and asymmetrical voltage sags on dfig-based wind turbines considering phaseangle jump, voltage recovery, and sag parameters,” IEEE Trans. Power Electron., to be published.

Modeling And Simulation For Voltage Sags/Swells Mitigation Using Dynamic Voltage Restorer (Dvr)

ABSTRACT

 This project describes the problem of voltage sags and swells and its severe impact on non linear loads or sensitive loads. The dynamic voltage restorer (DVR) has become popular as a cost effective solution for the protection of sensitive loads from voltage sags and swells. The control of the compensation voltages in DVR based on dqo algorithm is discussed. It first analyzes the power circuit of a DVR system in order to come up with appropriate control limitations and control targets for the compensation voltage control. The proposed control scheme is simple to design. Simulation results carried out by Matlab/Simulink verify the performance of the proposed method .

KEYWORDS

  1. DVR
  2. Voltage sags
  3. Voltage swells
  4. Sensitive load

 

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM

 DVR

Figure 1: Schematic diagram of DVR

 

FLOWCHART:

  

Fig.2 Flow Chart Of Feed forward Control Technique For DVR Based Ob DQO Transformation

Three-phase voltages sag:

Figure 3. Three-phase voltages sag: (a)-Source voltage,(b)-Injected voltage, (c)-Load voltage

Single-phase voltage sag

Figure.4. Single-phase voltage sag: (a)-Source voltage, (b)-Injected voltage, (c)-Load voltage

Three-phase voltages swell

Figure.5.Three-phase voltages swell: (a)-Source voltage, (b)-Injected voltage, (c)-Load voltage

Two-phase voltages swell

Figure. 6. Two-phase voltages swell: (a)-Source voltage, (b)-Injected voltage, (c)-Load voltage

 

CONCLUSION:

 The modeling and simulation of a DVR using MATLAB/SIMULINK has been presented. A control system based on dqo technique which is a scaled error of the between source side of the DVR and its reference for sags/swell correction has been presented. The simulation shows that the DVR performance is satisfactory in mitigating voltage sags/swells.

 

REFERENCES:

  • G. Hingorani, “Introducing Custom Power in IEEE Spectrum,” 32p, pp. 4l-48, 1995.
  • IEEE Std. 1159 – 1995, “Recommended Practice for Monitoring Electric Power Quality”.
  • Boonchiam and N. Mithulananthan, “Understanding of Dynamic Voltage Restorers through MATLAB Simulation,” Thammasat Int. J. Sc. Tech., Vol. 11, No. 3, July-Sept 2006.
  • G. Nielsen, M. Newman, H. Nielsen,and F. Blaabjerg, “Control and testing of a dynamic voltage restorer (DVR) at medium voltage level,” IEEE Trans. Power Electron., vol. 19, no. 3,p.806, May 2004.
  • Ghosh and G. Ledwich, “Power Quality Enhancement Using Custom Power Devices,” Kluwer Academic Publishers, 2002.
  • Modeling And Simulation For Voltage Sags/Swells Mitigation Using Dynamic Voltage Restorer (Dvr)

Transformer-less dynamic voltage restorer based on buck-boost converter

ABSTRACT

In this study, a new topology for dynamic voltage restorer (DVR) has been proposed. The topology is inspired by the buck-boost ac/ac converter to produce the required compensation voltage. This topology is able to compensate different voltage disturbances such as sag, swell and flicker without leap of the phase angle. The mass of the proposed topology has been reduced due to lack of injection topology. In addition to, the required compensation energy is directly delivered from the grid through the grid voltage. Therefore, the massive dc-link capacitors are not required to implement. To verify the qualification of the topology, the simulation results by MATLAB/SIMULINK software have been presented. Moreover, an experimental prototype of the case study has been designed and tested.

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1 Proposed topology

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation results for sag compensation

 

 

Fig. 3 Simulation results for swell compensation

 

Fig. 4. Simulation results

 

CONCLUSION

In this paper a new topology for DVR using buck-boost ac/ac converter was proposed. This topology contains five bidirectional switches, an inductor and a capacitor. Unlike the conventional topologies, the proposed DVR does not have any injection transformer due to the structural features. Because of direct connection to the grid, the storage elements are not required in the proposed topology. Therefore, this topology has less physical volume, mass and price in comparison with traditional topologies. Any kind of voltage disturbances can be compensated by the proposed topology and the effective operation has been confirmed by simulation and experimental results.

 

 

 

REFERENCES

 

  • Hietpas, S.M., Naden, M.: ‘Automatic voltage regulator using an AC voltagevoltage converter’, IEEE Trans. Ind. Appl., 2000, 36, (1), pp. 33–38
  • Vilathgamuwa, D.M., Member, S., Perera, A.A.D.R., et al.: ‘Dynamic voltage restorer’, 2003, 18, (3), pp. 928–936
  • Wijekoon, H.M., Vilathgamuwa, D.M., Choi, S.S.: ‘Interline dynamic voltage restorer: an economical way to improve interline power quality’, IEE Proc. Gener. Transm. Distrib., 2003, 150, (5), pp. 513–520
  • Wang, B., Member, S., Venkataramanan, G., et al.: ‘Operation and control of a dynamic voltage restorer using transformer coupled H-bridge converters’, 2006, 21, (4), pp. 1053–1061
  • Babaei, E., Farhadi Kangarlu, M.: ‘Voltage quality improvement by a dynamic voltage restorer based on a direct three-phase converter with fictitious DC link’, IET Gener. Transm. Distrib., 2011, 5, (8), p. 814

Sensitive Load Voltage Compensation Performed by a Suitable Control Method

IEEE Transactions on Industry Applications, 2016

ABSTRACT

This work proposes the usage of a repetitive-based control to dynamically restore the voltage applied to sensitive and critical loads of power system. The control intrinsically is able to wipe off harmonic distortion and relies on simple transfer function. As a consequence, there is no need to apply harmonic selective filters. Furthermore, the control system is able to work out on sinusoid references and, thus, avoids the need of employing the dq transform. A recursive least-squares is also included to the control system in order to assure the synchronization of the voltages to be restored. The design of the control parameters along with the system stability is discussed. The experimental results are produced with a setup of a three phase series compensator. The scenarios for emulating faulty voltages are the same for experimental and simulated results. The results corroborate the usage of the proposed method.

 

KEYWORDS

  1. Bode plot
  2. DVR-Dynamic voltage restorer
  3. Nyquist stability
  4. Repetitive control
  5. Sensitive load
  6. Series compensator
  7. Voltage quality
  8. Voltage sag.

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1 Series compensation system. (a) Electrical grid with compensation to sensitive load. (b) Single-phase equivalent circuit for the feed of sensitive load.

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Sagged grid scenario. (a) Sagged and controlled output voltages. (b) Detail of the correction instant.

 

Fig. 3 Sagged/distorted grid and controlled output voltages.

Fig. 4. Sagged grid and controlled output voltages with RLS algorithm included.

Fig. 5. Sagged/distorted grid scenario. (a) Sagged/distorted and controlled output voltages. (b) Detail of the correction instant.

 

CONCLUSION

This paper has proposed a repetitive control technique to be applied to a series compensator which protects critical loads against voltage distortions from the power grid. The system stability is assured by a low-pass filter which attenuates the resonant peaks from the repetitive controller above a frequency value. This value should be greater than the expected highest harmonic interference endured by the system. The low-pass filter is cascaded with the repetitive controller. The control system is implemented in the discrete domain, employing the trapezoidal integration. Three scenarios including harmonics and sag interferences have been used to test the proposed control system. The controller has proved to be effective to mitigate them. Furthermore, an experimental setup of the series compensator has been mounted to verify the simulations. The results corroborate the proposed controller.

 

REFERENCES

  • Jothibasu and M. Mishra, “An improved direct AC-AC converter for voltage sag mitigation,” IEEE Trans. Ind. Electron., vol. 62, no. 1, pp. 21–29, Jan. 2015.
  • R. Alam, K. M. Muttaqi, and A. Bouzerdoum, “Characterizing voltage sags and swells using three-phase voltage ellipse parameters,” IEEE Trans. Ind. Appl., vol. 51, no. 4, pp. 2780–2790, Apr. 2015.
  • Hao and X. Yonghai, “Control strategy of PV inverter under unbalanced grid voltage sag,” in IEEE Energy Conversion Congress and Exposition, ECCE, vol. 1, no. 1, Sept. 2014, pp. 1029–1034.
  • W. Li, D. M. Vilathgamuwa, F. Blaabjerg, and P. Loh, “A robust control scheme for medium-voltage-level DVR implementation,” IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 2249–2261, Aug. 2007.
  • Jothibasu and M. Mishra, “A control scheme for storageless DVR based on characterization of voltage sags,” IEEE Trans. Power Del., vol. 29, no. 5, pp. 2261–2269, Oct. 2014.

Investigation on Dynamic Voltage Restorers With Two DC-Links and Series Converters for Three-Phase Four-Wire Systems

IEEE, 2014 

ABSTRACT

This paper proposes three dynamic voltage restorer (DVR) topologies. Such configurations are able to compensate voltage sags/swells in three-phase four-wire (3P4W) systems under balanced and unbalanced conditions. The proposed systems in this work use two independent dc-links. The complete control system, including the PWM technique, is developed and comparisons between the proposed configurations and a conventional one are performed. Simulation and experimental results are provided to validate the theoretical approach.

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1 Typical DVR location in a 3P4W power distribution system

 

 EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation results. Injected voltages by the DVR considering conventional 3HB topology and proposed configurations with equal dc-link voltages (vCa=vCb ! dc-link ratio 1:1) and different dc-link voltages (vCa 6= vCb ! dc-link ratios 1:2 and 1:3).

 

Fig. 3 Simulation results. Dynamic system operation under 30% single-phase sag in time domain. (a) Grid voltages. (b) Injected voltages by DVR. (c) Load voltages.

Fig. 4. Simulation results. Dynamic system operation under 30% two-phase sag in time domain. (a) Grid voltages. (b) Injected voltages by DVR. (c) Load voltages.

Fig. 5. Simulation results. Dynamic system operation under 30% three-phase sag in time domain. (a) Grid voltages. (b) Injected voltages by DVR. (c) Load voltages.

 

CONCLUSION

In this paper three four-wire dynamic voltage restorers (DVRs) have been presented. The studied configurations in this work are based on the concept of open-end winding. Simulated and experimental results presented show that the proposed DVRs are feasible and suitable for power distribution system with YY transformers with neutrals grounded.

 

REFERENCES

  • Brumsickle, G. Luckjiff, R. Schneider, D. Divan, and M. Mc- Granaghan, “Dynamic sag correctors: cost effective industrial power line conditioning,” in Industry Applications Conference, 1999. Thirty-Fourth IAS Annual Meeting. Conference Record of the 1999 IEEE, vol. 2, pp. 1339–1344 vol.2, 1999.
  • McGranaghan, D. Mueller, and M. Samotyj, “Voltage sags in industrial systems,” Industry Applications, IEEE Transactions on, vol. 29, no. 2, pp. 397–403, 1993.
  • -m. Ho and H.-H. Chung, “Implementation and performance evaluation of a fast dynamic control scheme for capacitor-supported interline DVR,” Power Electronics, IEEE Transactions on, vol. 25, no. 8,pp. 1975–1988, 2010.
  • Ghosh and G. Ledwich, “Compensation of distribution system voltage using DVR,” Power Delivery, IEEE Transactions on, vol. 17, no. 4, pp. 1030–1036, 2002.
  • Nielsen, M. Newman, H. Nielsen, and F. Blaabjerg, “Control and testing of a dynamic voltage restorer (DVR) at medium voltage level,” Power Electronics, IEEE Transactions on, vol. 19, no. 3, pp. 806–813,2004.

Evaluation of DVR Capability Enhancement -Zero Active Power Tracking Technique

IEEE, 2016

ABSTRACT:

This paper presents a utilization technique for enhancing the capabilities of dynamic voltage restorers (DVRs). This study aims to enhance the abilities of DVRs to maintain acceptable voltages and last longer during compensation. Both the magnitude and phase displacement angle of the synthesized DVR voltage are precisely adjusted to achieve lower power utilization. The real and reactive powers are calculated in real time in the tracking loop to achieve better conditions. This technique results in less energy being taken out of the DC-link capacitor, resulting in smaller size requirements. The results from both the simulation and experimental tests illustrate that the proposed technique clearly achieved superior performance. The DVR’s active action period was considerably longer, with nearly 5 times the energy left in the DC-link capacitor for further compensation compared to the traditional technique. This technical merit demonstrates that DVRs could cover a wider range of voltage sags; the practicality of this idea for better utilization is better than that of existing installed DVRs.

 

KEYWORDS:

  1. DVR capability
  2. Energy optimized
  3. Energy source
  4. Series compensator
  5. Voltage stability

 

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

 

Fig 1: Single-line diagram of a power system with the DVR connected at PCC.

 

EXPECTED SIMULATION RESULTS:

Fig.2. D-axis voltages at the system (VSd), DVR (VDVRd), and load (VLd). during in-phase compensation (simulation).

Fig. 3. Q-axis voltages at the system (VSq), DVR (VDVRq), and load (VLq) during in-phase compensation (simulation).

Fig. 4. The overall three-phase voltage signals during in-phase compensation (simulation).

Fig.5 Real power at source (PS), the DVR (PDVR) and load (PL) during in- phase compensation (simulation).

Fig. 6 The DVR DC-side voltage (VDC) during in-phase compensation (simulation).

.

Fig. 7. D-axis voltages at the system(VSd), DVR (VDVRd), and load (VLd) during zero-real power tracking compensation (simulation).

Fig. 8.. Q-axis voltages at the system (VSq), DVR (VDVRq), and load (VLq) during zero-real power tracking compensation (simulation).

Fig. 9. The overall three-phase voltage signals during zero-real power tracking compensation (simulation).

Fig. 10. Real power at source (PS), the DVR (PDVR) and load (PL) zero-real power tracking compensation (simulation).

 

CONCLUSION:

It is clear from both the simulation and experimental results illustrated in this paper that the proposed zero-real power tracking technique applied to DVR-based compensation can result in superior performance compared to the traditional in-phase technique. The experimental test results match those proposed using simulation, although some discrepancies due to the imperfect nature of the test circuit components were seen.

With the traditional in-phase technique, the compensation was performed and depended on the real power injected to the system. Then, more of the energy stored in the DC-link capacitor was utilized quickly, reaching its limitation within a shorter period. The compensation was eventually forced to stop before the entire voltage sag period was finished. When the compensation was conducted using the proposed technique, less energy was used for the converter basic switching process.

The clear advantage in terms of the voltage level at the DC-link capacitor indicates that with the proposed technique, more energy remains in the DVR (67% to 14% in the traditional in-phase technique), which guarantees the correct compensating voltage will be provided for longer periods of compensation. With this technique, none (or less) of the real power will be transferred to the system, which provides more for the DVR to cover a wider range of voltage sags, adding more flexible adaptive control to the solution of sag voltage disturbances.

 

REFERENCES:

  • Bollen, Understanding Power Quality Problems, Voltage Sags and Interruptions. New York: IEEE Press, 1999.
  • Roldán-Pérez, A. García-Cerrada, J. L. Zamora-Macho, P. Roncero-Sánchez, and E. Acha, “Troubleshooting a digital repetitive controller for a versatile dynamic voltage restorer,” Int. J. Elect. Power Energy Syst., vol. 57, pp. 105–115, May 2014.
  • Kanjiya, B. Singh, A. Chandra, and K. Al-Haddad, “SRF theory revisited to control self-supported dynamic voltage restorer (DVR) for unbalanced and nonlinear loads,” IEEE Trans. Ind. Appl., vol. 49, no. 5, pp. 2330–2340, Sep. 2013.
  • Naidu, and D. Fernandes, “Dynamic voltage restorer based on a four-leg voltage source converter,” IET Generation, Transmission & Distribution, vol. 3, no. 5, pp. 437–447, May 2009.
  • Jimichi, H. Fujita, and H. Akagi, “A dynamic voltage restorer equipped with a high-frequency isolated dc-dc converter,” IEEE Trans. Ind. Appl., vol. 47, no. 1, pp. 169–175, Jan. 2011.

 

Dual-Buck AC–AC Converter with Inverting and Non-Inverting Operations

IEEE Transactions on Power Electronics, 2018

 ABSTRACT:

A buck-boost ac-ac converter with inverting and non-inverting operations is proposed. It compensates both the voltage sag and swell when used as a dynamic voltage restorer. Its basic switching cell is a unidirectional buck circuit, owing to which it has no shoot-through concerns. It achieves safe commutation without using RC snubbers or soft commutation strategies. Further, it can be implemented with power MOSFETs without their body diodes conducting, and for current freewheeling external diodes of good reverse recovery features can be used to minimize the reverse recovery issues and relevant loss. The detailed theoretical analysis and experimental results of a 300-W prototype converter are provided. dual-buck

 

KEYWORDS:

  1. AC–AC converter
  2. Bipolar voltage gain
  3. Commutation
  4. Dual-buck
  5. DVR
  6. MOSFET

 

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig 1: Proposed buck-boost ac-ac converter

 

EXPECTED SIMULATION RESULTS:

Fig.2. NIB operation. (a) Input and output voltages and inductor current. (b) Drain-source voltages of switches.

Fig. 3. IBB operation (buck mode). (a) Input and output voltages and inductor current. (b) Drain-source voltages of switches.

Fig. 4. IBB operation (boost mode). (a) Input and output voltages and inductor current. (b) Drain-source voltages of switches.

Fig.5. INIBB operation (non-inverting buck). (a) Input and output voltages and inductor current. (b) Drain-source voltages of switches.

Fig.6. INIBB operation (inverting buck). (a) Input and output voltages and inductor current. (b) Drain-source voltages of switches.

Fig. 7. INIBB operation (inverting boost). (a) Input and output voltages and inductor current. (b) Drain-source voltages of switches.

Fig. 8. Experimental results with partially inductive load. (a) NIB operation. (b) IBB operation.

Fig. 9. Experimental results with non-linear load in NIB operation.

Fig. 10. Experimental results of the proposed DVR.

 

CONCLUSION:

In this paper, a novel dual buck-boost ac-ac converter is proposed. It combined the operations of non-inverting buck and inverting buck-boost converters in one structure. Similar to the buck converter, it has a non-inverting buck operation, and similar to an inverting buck-boost converter, it has an inverting buck-boost operation. In addition, it has an extra operation, in which the output voltage higher or lower than the input voltage that is in-phase or out-of-phase with the input voltage can be obtained. Thus, the proposed converter can compensate both voltage sag and swell when used in a DVR.

The basic unit of the proposed converter is a unidirectional buck circuit, therefore it has no short-circuit and open-circuit problems. It has no commutation problems, and does not require lossy snubbers and/or soft commutation strategies for operation. Further, it can utilize MOSFETs without their body diodes conducting and without reverse recovery issues and relevant losses. A detailed analysis of the proposed converter and DVR has been presented and validated by experimental results.

 

REFERENCES:

  • E. Brumsickle, R. S. Schneider, G. A. Luckjiff, D. M. Divan, and M. F. McGranaghan, “Dynamic sag correctors: cost-effective industrial power line conditioning,” IEEE Trans. Ind. Appl., vol. 37, no. 1, pp. 212– 217, Jan./Feb. 2001.
  • Subramanian and M. K. Mishra, “Interphase ac-ac topology for sag supporter,” IEEE Trans. Power Electron., vol. 25, no. 2, pp. 514–518, Feb. 2010.
  • IEEE Recommended Practice for Monitoring Electric Power Quality, IEEE Standard 1159-2009 (Revision of IEEE Standard 1159-1995), 2009.
  • M.-David, S. Bhattacharya and G. Venkataramanan, “A comparative evaluation of series power-flow controllers using dc- and ac-link converters,” IEEE Trans. Power Del., vol. 23, no. 2, pp. 985-996, Apr. 2008.
  • Francis, and T. Thomas, “Mitigation of voltage sag and swell using dynamic voltage restorer,” 2014 Annual International Conference on Emerging Research Areas: Magnetics, Machines and Drives (AICERA/iCMMD), Kottayam, 2014, pp. 1-6.

Dual-Buck AC–AC Converter with Inverting and Non-Inverting Operations

 

Improved Phasor Estimation Method for Dynamic Voltage Restorer Applications

 

IEEE Transactions on Power Delivery, 2013

ABSTRACT

The dynamic voltage restorer (DVR) is a series compensator for distribution system applications, which protects sensitive loads against voltage sags by fast voltage injection. The DVR must estimate the magnitude and phase of the measured voltages to achieve the desired performance. This paper proposes a phasor parameter estimation algorithm based on a recursive variable and fixed data window Least Error Squares (LES) method for the DVR control system. The proposed algorithm, in addition to decreasing the computational burden, improves the frequency response of the control scheme based on the fixed data window LES method. The DVR control system based on the proposed algorithm provides a better compromise between the estimation speed and accuracy of the voltage and current signals and can be implemented using a simple and low cost processor. The results of the studies indicate that the proposed algorithm is insensitive to noise, harmonics, interharmonics and DC offset unlike the LES method, while both methods estimate the phasor parameters within 5 ms. The performance of the control scheme based on the proposed method is evaluated by multiple case studies in the PSCAD/EMTDC environment and experimentally validated based on a laboratory setup.

 

KEYWORDS

  1. Dynamic voltage restorer
  2. Phasor estimation
  3. Least Error Squares
  4. Minimum energy
  5. Four-leg inverter

 

SOFTWARE: MATLAB/SIMULINK

 

CIRCUIT DIAGRAM:

Fig. 1 Power circuit schematic of the four-wire DVR

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Sag compensation during SLG fault in the presence of zero sequence component, (a) Grid voltages (V), (b) Estimated grid voltage magnitude of phase A by the improved phasor estimation method, LES, RLS and ADALINE (V), (c) Compensated load voltages (V)

 

Fig. 3 Sag compensation under nonlinear load conditions, (a) Grid voltages (V), (b) Load currents (A), (c) Compensated load voltages (V)

Fig. 4. Comparison between the improved estimation method, LES, RLS and ADALINE under nonlinear load conditions, (a) Estimated grid voltage magnitude of phase A (V), (b) Estimated grid voltage angle of phase A (rad), (c) Estimated load current angle of phase A (rad)

Fig. 5. Comparison between the improved estimation method, LES, RLS and ADALINE under interharmonics and DC offset conditions, (a) Input signal (p.u.), (b) Estimated magnitude (p.u.), (c) Estimated phase angle (rad)

 

CONCLUSION

This paper proposes an improved phasor estimation method for DVR control system using a recursive Least Error Squares (LES) method with fixed and variable data window lengths. The proposed algorithm improves the frequency response of the control scheme based on the fixed data window LES in additional to decreasing the computational burden. Thus, it provides a desirable compromise among the speed, accuracy and the amount of computations for the phasor estimation of DVR signals. The experimental and simulation results confirmed that:

1) The estimation time is less than 5 ms and its accuracy increases gradually and it is not sensitive to noise, harmonics, interharmonics and DC offset. Consequently, it is fast and accurate.

2) The proposed algorithm is able to estimate several signal phasors simultaneously in real-time using a low cost processor.

3) The proposed scheme can compensate balanced and unbalanced sag scenarios accurately and within the required time under linear and nonlinear load conditions.

Moreover, during voltage sag compensation, the minimum energy is used and the voltage sags can be compensated without any additional energy storage.

 

REFERENCES

  • Fernandez-comesana, F. D. Freijedo, J. Doval-gandoy, O. Lopez, A. G. Yepes, and J. Malvar, ―Mitigation of voltage sags , imbalances and harmonics in sensitive industrial loads by means of a series power line conditioner,‖ Electr. Power Syst. Res., vol. 84, no. 1, pp. 20–30, 2012.
  • Zhan, V. K. Ramachandaramurthy, A. Arulampalam, C. Fitzer, S. Kromlidis, M. Barnes, and N. Jenkins, ―Dynamic voltage restorer based on voltage-space-vector PWM control,‖ IEEE Trans. Ind. Appl., vol. 37, no. 6, pp. 1855–1863, Nov./Dec. 2001.
  • -C. So, Y.-S. Lee, and M. H. L. Chow, ―Design of a 1-kVA parallel-type AC voltage sag compensator,‖ IET Power Electron., vol. 5, no. 5, pp. 591– 599, 2012.
  • Zhan, A. Arulampalam, and N. Jenkins, ―Four-wire dynamic voltage restorer based on a three-dimensional voltage space vector PWM algorithm,‖ IEEE Trans. Power Electron., vol. 18, no. 4, pp. 1093–1102, Jul. 2003.
  • Roncero-sánchez, E. Acha, J. E. Ortega-calderon, V. Feliu, and A. García-Cerrada, ―A versatile control scheme for a dynamic voltage restorer for power-quality improvement,‖ IEEE Trans. Power Deliv., vol. 24, no. 1, pp. 277–284, Jan. 2009.

Dynamic Voltage Restorer Based on Three-Phase Inverters Cascaded Through an Open-End Winding Transformer

IEEE Transactions on Power Electronics, 2015

ABSTRACT

This paper investigates a dynamic voltage restorer (DVR) composed of two conventional three-phase inverters series cascaded through an open-end winding (OEW) transformer, denominated here DVR-OEW. The DVR-OEW operating with either equal or different dc-link voltages are examined. The proposed topology aims to regulate the voltage at the load side in the case of voltage sags/swells, distortion, or unbalance at the grid voltage. A suitable control strategy is developed, including space-vector analysis, level-shifted PWM (LSPWM) and its equivalent optimized single-carrier PWM (SCPWM), as well as the operating principles and characteristics of the DVR. Comparisons among the DVR-OEW and conventional configurations, including a neutral-point clamped (NPC) converter based DVR, are furnished. The main advantages of the DVROEW compared to the conventional topologies lie on: i) reduced harmonic distortion, ii) reduced converter losses, and iii) reduced voltage rating of the power switches. Simulated and experimental results are presented to validate the theoretical studies.

 

SOFTWARE: MATLAB/SIMULINK

 

 BLOCK DIAGRAM:

Fig. 1 Example of a typical application of DVR in Medium-Voltage (MV) distribution system..

 

EXPECTED SIMULATION RESULTS:

Fig. 2. System voltages for vca = vcb. (a) Grid voltages (egj). (b) DVR voltages at the secondary side of the injection transformers (vsj ). (c) Load voltages (vlj ). (d) Injected voltage (vp1) for one phase at the primary side of injection transformer.

 

Fig. 3. Pole voltages in one phase at inverters A (v1a0a) and B (v1b0b), respectively. (a) OEW inverter operates with alternatively leg of converter clamped in every half cycle. (b) OEW inverter operates by clamping inverter A.

 

CONCLUSION

In this paper a dynamic voltage restorer (DVR) obtained by means of the series connection of two three-phase inverters through an open-end winding transformer was presented. Two equivalent implementations with either level-shifted carrier PWM (LSPWM) or single-carrier PWM (SCPWM) strategy approaches were presented. The main advantages of the proposed topology, compared to conventional configurations with three legs (see Fig. 2(a)), six-leg (see Fig. 2(b)) and NPC (see Fig. 2(c)) lies on: (i) reduced harmonic distortion (operating at the same switching frequency), (ii) reduced converter losses (operating with the same harmonic distortion), (iii) reduced converter losses (with the same switching frequency), see Table III and (iv) reduced voltage rating of the power switches employed in the DVR. The operations with different dc-link voltages have been investigated and it is shown that much lower harmonic distortion can be obtained. The proposed DVR system is suitable for medium voltage application. Simulated and experimental results were also presented.

 

REFERENCES

  • Goharrizi, S. Hosseini, M. Sabahi, and G. Gharehpetian, “Threephase HFL-DVR with independently controlled phases,” Power Electronics, IEEE Transactions on, vol. 27, pp. 1706–1718, April 2012.
  • Biswas, S. Goswami, and A. Chatterjee, “Optimal distributed generation placement in shunt capacitor compensated distribution systems considering voltage sag and harmonics distortions,” Generation, Transmission Distribution, IET, vol. 8, pp. 783–797, May 2014.
  • N. M. Ho and H. S. H. Chung, “Implementation and performance evaluation of a fast dynamic control scheme for capacitor-supported interline DVR,” IEEE Trans. Power Electron., vol. 25, pp. 1975 –1988, Aug. 2010.
  • Rosas-Caro, F. Mancilla-David, J. Ramirez-Arredondo, and A. Bakir, “Two-switch three-phase ac-link dynamic voltage restorer,” Power Electronics, IET, vol. 5, pp. 1754–1763, November 2012.
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Design Considerations of a Fault Current Limiting Dynamic Voltage Restorer (FCL-DVR)

IEEE TRANSACTIONS ON SMART GRID, 2014

ABSTRACT

This paper proposes a new fault current limiting dynamic voltage restorer (FCL-DVR) concept. The new topology uses a crowbar bidirectional thyristor switch across the output terminals of a conventional back-to-back DVR. In the event of a load short, the DVR controller will deactivate the faulty phase of the DVR and activate its crowbar thyristor to insert the DVR filter reactor into the grid to limit the fault current. A fault condition is detected by sensing the load current and its rate of change. The FCL-DVR will operate with different protection strategies under different fault conditions. Design of the FCL-DVR involves selecting important parameters, such as DVR power rating, dc link voltage of the DVR, output filter reactors and capacitors, and grid-tied transformers is proposed. The design methodology of the proposed FCL-DVR is fully discussed based on power systems computer aided design (PSCAD)/electromagnetic transients including dc (EMTDC) simulation. A scaled-down experimental verification is also carried out. Both modeling and experimental results confirm the effectiveness of the new FCL-DVR concept for performing both voltage compensation and fault current limiting functions.

 

KEYWORDS:

  1. Dynamic voltage restorer (DVR)
  2. Fault current limiting (FCL)
  3. Parameter design method
  4. Voltage compensation

 

SOFTWARE: MATLAB/SIMULINK

 

CIRCUIT DIAGRAM:

Fig. 1 Topology of FCL-DVR.

 

 EXPECTED SIMULATION RESULTS:

Fig 2. Simulation results of voltage compensation operation of FCL-DVR. Waveforms of grid voltages, PCC voltages, load currents FCL-DVR output voltages, and dc link voltages of the FCL-DVR during voltage fluctuation event and (b) unbalanced voltage event.

Fig. 3 Simulation waveforms of grid voltages, PCC voltages, load currents, FCL-DVR output voltages, and FCL-DVR dc link voltages during (a) single-phase to ground, (b) phase-to-phase, (c) two-phase to ground, and (d) three-phase to ground short circuit fault.

Fig. 4. Simulation results of fault current limiting and recovery processes of FCL-DVR. Simulation waveforms of the IGBT currents, thyristor currents, thyristor voltages, and dc link voltages of the FCL-DVR during (a) current limiting stage under a three-phase to ground short-circuit fault and (b) recovery stage after the three-phase to ground short-circuit fault is removed

 

CONCLUSION

A new FCL-DVR concept is proposed to deal with both voltage fluctuation and short current faults. The new topology uses a crowbar bidirectional thyristor switch across the output terminals of a conventional back-to-back DVR. In the event of load short, the DVR controller will deactivate the faulty phase of the DVR and activate its crowbar thyristor to insert the DVR filter reactor into the grid to limit the fault current. The FCL-DVR will operate with different protection strategies under different fault conditions. Based on theoretical analysis, PSCAD/EMTDC simulation and experimental study, we conclude the following.

1) With the crowbar bidirectional thyristor across the output terminal of the inverter, the proposed FCL-DVR can compensate voltage fluctuation and limit fault current.

2) The FCL-DVR can be used to deal with different types of short faults with minimum influence on nonfault phases. The FCL-DVR has the same power rating as a conventional DVR.

3) The delta-connection mode of the shunt transformers minimizes the influence of dc link voltage fluctuations and suppresses the 3rd harmonics.

4) The proposed control method can detect faults within two cycles.

5) The design methodology based on the analysis of the relationship between main circuit parameters and compensation capacity could be helpful to the design of FCL-DVR.

 

REFERENCES

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