Self-tuned fuzzy-proportional–integral compensated zero/minimum active power algorithm based dynamic voltage restorer

Self-tuned fuzzy-proportional–integral compensated zero/minimum active power algorithm based dynamic voltage restorer

ABSTRACT:

Voltage sag is the most common and severe power quality problem in the recent times due to its detrimental effects on modern sensitive equipment. Generally, direct-on-line starting of the three-phase induction motor (IM) and various kinds of short circuit fault are directly responsible for this event. This study investigates the impacts of starting and stopping of two three phase IMs on the load voltage profile. To be more critical, two three-phase short circuit faults and one unsymmetrical fault are also simulated in the same network at different instants of time. A simple control algorithm of a real power optimised dynamic voltage restorer (DVR) with a reduced power factor strategy is presented to protect the sensitive load from these types of detrimental events. A novel fuzzy-proportional–integral based self-tuned control methodology is implemented in the proposed work to compensate the loss in the DVR circuit as well as to regulate the load voltage and the direct current link voltage. The results show the effectiveness of the adopted control scheme in DVR application to mitigate the voltage sag.

 KEYWORDS:

  1. Dynamic Voltage Restorer
  2. fuzzy-proportional-integral

SOFTWARE: MATLAB/SIMULINK

 

DIAGRAM:

 

Fig. 1 Investigated distributed test system with DVR

  

EXPECTED SIMULATION RESULTS:

Figure 2. Voltage profile of load and DVR (a) Without DVR, (b) DVR voltage, (c) With DVR, (d) DC voltage

Figure 3 Torque profile of IMs (a) Motor 1without DVR, (b) Motor 2 without DVR, (c) Motor 1 with DVR, (d) Motor 2 with DVR

 

Figure 4. Pertaining to unsymmetrical fault (a) Load voltage without DVR, (b) DVR voltage, (c) Load voltage with DVR

Figure 5. Active DVR power profile pertaining to (a) In-phase compensation, (b) Present technique

 

 CONCLUSION:

This study divulges a simple yet robust reduced power factor controlled energy optimised algorithm in DVR to offer a common solution to mitigate the severe voltage sag. Minimisation of energy delivered may increase the life of the ESU, therefore limits the expenditure indirectly. The self-tuned fuzzy-Proportional-Integral scheme also plays a significant role to regulate the active power through the DVR as well as to compensate the load voltage and DVR losses. The results obtained in this work shows that the proposed DVR solution provides a good and satisfactory level of compensation. The system voltage has been compensated nearly up to its nominal value. The DC voltage is also very fairly regulated. The application of DVR reduces the level of oscillation in the torque profile of the IM. The proposed method is also compared with other strategies surfaced in the existing literature and it is unfold that the proposed strategy offers better harmonic compensation and it also provides better damping in the load voltage. Thus, it may be concluded that the proposed control technique of DVR, operated by adaptive fuzzy control scheme, may be justified for utilizing the same as a common sag mitigating device. Within the context of the present study, the work is ended with simulation only. However, the same may be tested on an experimental bench fuzzy-proportional-integral.

 

REFERENCES:

  • McGranaghan, M.F., Mueller, D.R., Samotyj, M.J.: ‘Voltage sags in industrial systems’, IEEE Trans. Ind. Appl., 1993, 29, (2), pp. 397–403
  • Moreno-Munoz, A., De-la-Rosa, J.J.G., Lopez-Rodriguez, M.A., et al.: ‘Improvement of power quality using distributed generation’, J. Electr. Power Energy Syst., 2010, 32, (10), pp. 1069–1076
  • Bollen, M.H.J.: ‘Understanding power quality problems’ (Wiley-IEEE Press, Hoboken, NJ, USA, 1999)
  • Honrubia-Escribano, A., Gomez-Lazaro, E., Molina-Garcia, A., et al.: ‘Influence of voltage dips on industrial equipment: analysis and assessment’, J. Electr. Power Energy Syst., 2012, 41, pp. 87–95
  • Kamble, S., Thorat, C.: ‘Characteristics analysis of voltage sag in distribution system using rms voltage method’, ACEEE Int. J. Electr. Power Eng., 2012,3, (1), pp. 55–61

Investigation on Dynamic Voltage Restorers With Two DC-Links and Series Converters for Three-Phase Four-Wire Systems

IEEE, 2014 

ABSTRACT

This paper proposes three dynamic voltage restorer (DVR) topologies. Such configurations are able to compensate voltage sags/swells in three-phase four-wire (3P4W) systems under balanced and unbalanced conditions. The proposed systems in this work use two independent dc-links. The complete control system, including the PWM technique, is developed and comparisons between the proposed configurations and a conventional one are performed. Simulation and experimental results are provided to validate the theoretical approach.

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1 Typical DVR location in a 3P4W power distribution system

 

 EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation results. Injected voltages by the DVR considering conventional 3HB topology and proposed configurations with equal dc-link voltages (vCa=vCb ! dc-link ratio 1:1) and different dc-link voltages (vCa 6= vCb ! dc-link ratios 1:2 and 1:3).

 

Fig. 3 Simulation results. Dynamic system operation under 30% single-phase sag in time domain. (a) Grid voltages. (b) Injected voltages by DVR. (c) Load voltages.

Fig. 4. Simulation results. Dynamic system operation under 30% two-phase sag in time domain. (a) Grid voltages. (b) Injected voltages by DVR. (c) Load voltages.

Fig. 5. Simulation results. Dynamic system operation under 30% three-phase sag in time domain. (a) Grid voltages. (b) Injected voltages by DVR. (c) Load voltages.

 

CONCLUSION

In this paper three four-wire dynamic voltage restorers (DVRs) have been presented. The studied configurations in this work are based on the concept of open-end winding. Simulated and experimental results presented show that the proposed DVRs are feasible and suitable for power distribution system with YY transformers with neutrals grounded.

 

REFERENCES

  • Brumsickle, G. Luckjiff, R. Schneider, D. Divan, and M. Mc- Granaghan, “Dynamic sag correctors: cost effective industrial power line conditioning,” in Industry Applications Conference, 1999. Thirty-Fourth IAS Annual Meeting. Conference Record of the 1999 IEEE, vol. 2, pp. 1339–1344 vol.2, 1999.
  • McGranaghan, D. Mueller, and M. Samotyj, “Voltage sags in industrial systems,” Industry Applications, IEEE Transactions on, vol. 29, no. 2, pp. 397–403, 1993.
  • -m. Ho and H.-H. Chung, “Implementation and performance evaluation of a fast dynamic control scheme for capacitor-supported interline DVR,” Power Electronics, IEEE Transactions on, vol. 25, no. 8,pp. 1975–1988, 2010.
  • Ghosh and G. Ledwich, “Compensation of distribution system voltage using DVR,” Power Delivery, IEEE Transactions on, vol. 17, no. 4, pp. 1030–1036, 2002.
  • Nielsen, M. Newman, H. Nielsen, and F. Blaabjerg, “Control and testing of a dynamic voltage restorer (DVR) at medium voltage level,” Power Electronics, IEEE Transactions on, vol. 19, no. 3, pp. 806–813,2004.

Design Considerations of a Fault Current Limiting Dynamic Voltage Restorer (FCL-DVR)

IEEE TRANSACTIONS ON SMART GRID, 2014

ABSTRACT

This paper proposes a new fault current limiting dynamic voltage restorer (FCL-DVR) concept. The new topology uses a crowbar bidirectional thyristor switch across the output terminals of a conventional back-to-back DVR. In the event of a load short, the DVR controller will deactivate the faulty phase of the DVR and activate its crowbar thyristor to insert the DVR filter reactor into the grid to limit the fault current. A fault condition is detected by sensing the load current and its rate of change. The FCL-DVR will operate with different protection strategies under different fault conditions. Design of the FCL-DVR involves selecting important parameters, such as DVR power rating, dc link voltage of the DVR, output filter reactors and capacitors, and grid-tied transformers is proposed. The design methodology of the proposed FCL-DVR is fully discussed based on power systems computer aided design (PSCAD)/electromagnetic transients including dc (EMTDC) simulation. A scaled-down experimental verification is also carried out. Both modeling and experimental results confirm the effectiveness of the new FCL-DVR concept for performing both voltage compensation and fault current limiting functions.

 

KEYWORDS:

  1. Dynamic voltage restorer (DVR)
  2. Fault current limiting (FCL)
  3. Parameter design method
  4. Voltage compensation

 

SOFTWARE: MATLAB/SIMULINK

 

CIRCUIT DIAGRAM:

Fig. 1 Topology of FCL-DVR.

 

 EXPECTED SIMULATION RESULTS:

Fig 2. Simulation results of voltage compensation operation of FCL-DVR. Waveforms of grid voltages, PCC voltages, load currents FCL-DVR output voltages, and dc link voltages of the FCL-DVR during voltage fluctuation event and (b) unbalanced voltage event.

Fig. 3 Simulation waveforms of grid voltages, PCC voltages, load currents, FCL-DVR output voltages, and FCL-DVR dc link voltages during (a) single-phase to ground, (b) phase-to-phase, (c) two-phase to ground, and (d) three-phase to ground short circuit fault.

Fig. 4. Simulation results of fault current limiting and recovery processes of FCL-DVR. Simulation waveforms of the IGBT currents, thyristor currents, thyristor voltages, and dc link voltages of the FCL-DVR during (a) current limiting stage under a three-phase to ground short-circuit fault and (b) recovery stage after the three-phase to ground short-circuit fault is removed

 

CONCLUSION

A new FCL-DVR concept is proposed to deal with both voltage fluctuation and short current faults. The new topology uses a crowbar bidirectional thyristor switch across the output terminals of a conventional back-to-back DVR. In the event of load short, the DVR controller will deactivate the faulty phase of the DVR and activate its crowbar thyristor to insert the DVR filter reactor into the grid to limit the fault current. The FCL-DVR will operate with different protection strategies under different fault conditions. Based on theoretical analysis, PSCAD/EMTDC simulation and experimental study, we conclude the following.

1) With the crowbar bidirectional thyristor across the output terminal of the inverter, the proposed FCL-DVR can compensate voltage fluctuation and limit fault current.

2) The FCL-DVR can be used to deal with different types of short faults with minimum influence on nonfault phases. The FCL-DVR has the same power rating as a conventional DVR.

3) The delta-connection mode of the shunt transformers minimizes the influence of dc link voltage fluctuations and suppresses the 3rd harmonics.

4) The proposed control method can detect faults within two cycles.

5) The design methodology based on the analysis of the relationship between main circuit parameters and compensation capacity could be helpful to the design of FCL-DVR.

 

REFERENCES

  • Shuai et al., “A dynamic hybrid var compensator and a two-level collaborative optimization compensation method,” IEEE Trans. Power Electron., vol. 24, no. 9, pp. 2091–2100, Sep. 2009.
  • Sainz, J. J. Mesas, R. Teodorescu, and P. Rodriguez, “Deterministic and stochastic study of wind farm harmonic currents,” IEEE Trans. Energy Convers., vol. 25, no. 4, pp. 1071–1080, Dec. 2010.
  • Boico and B. Lehman, “Multiple-input maximum power point tracking algorithm for solar panels with reduced sensing circuitry for portable applications,” Solar Energy, vol. 86, no. 1, pp. 463–475, Jan. 2012.
  • F. Arritt and R. C. Dugan, “Distribution system analysis and the future smart grid,” IEEE Trans. Ind. Appl., vol. 47, no. 6, pp. 2343–2350, Nov. 2011.
  • Supatti and F. Z. Peng, “Z-source inverter with grid connected for wind power system,” in Proc. Energy Convers. Congr. Expo. (ECCE), San Jose, CA, USA, 2009, pp. 398–403.

An Improved Direct AC-AC Converter for Voltage Sag Mitigation

IEEE Transactions on Industrial Electronics, 2013 

ABSTRACT

Dynamic Voltage Restorer (DVR) is a definitive solution towards compensation of voltage sag with phase jump. Conventional DVR topologies however have dc-link and two stage power conversion. This increases its size, cost and associated losses. Therefore topologies without the dc-link, mitigating sag by utilizing direct ac-ac converters, are preferable over the conventional ones. As no storage device is employed, compensation by these topologies is limited only by the voltages at the point of common coupling that is feeding the converters. In this paper, a direct ac-ac converter based topology fed with line voltages is proposed. The arrangement provides increased range of compensation in terms of magnitude and phase angle correction. Detailed simulations have been carried out in MATLAB to compare the capability of the proposed topology with other similar topologies.

 

KEYWORDS:

  1. Dynamic voltage restorer (DVR)
  2. Voltage source inverter (VSI)
  3. Voltage sag compensation
  4. Voltage phase jump compensation.
  5. AC-AC converter

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1. Interphase ac-ac converter topology

 

Fig. 2. Proposed converter topology.

  

EXPECTED SIMULATION RESULTS:

Fig. 3. Compensation of a sag type Ba. (a) Three phase voltage at the PCC with sag of 0.3 p.u. magnitude and 􀀀100 phase jump. (b) Three phase load voltage(c) Injected voltage. (d) The duty cycle of choppers in phase a sag supporter.

Fig. 4. Compensation of a sag type Ca. (a) Three phase voltage at the PCC with sag of 0.4 p.u. characteristic voltage magnitude and 􀀀200 phase jump. (b) Three phase load voltage at the PCC. (c) Injected voltages. (d) The duty cycle of voltages in phase b sag supporter. (e) The duty cycle of choppers in phase c sag supporter.

Fig. 5. Compensation  of  symmetrical  sag. (a) Three phase voltage at the PCC with sag of 0.5 p.u. magnitude and 􀀀600 phase jump. (b) Three phase load voltage at the PCC. (c) Injected voltages. (d) The duty cycle of voltages in all sag supporters.

 

CONCLUSION

In this paper, an ac-ac converter based voltage sag supporter fed with line voltage has been proposed to compensate voltage sag with phase jump. The operation and switching logic of this topology are explained in detail. The capability of the topology is tested for different types of voltage sags are compared with other topologies. This topology has the advantage of eliminating storage device and providing increased range of compensation. The efficacy of the proposed topology is validated through simulation and experimental studies. An intuitive method of classification of voltage sags [2], assorts sag into four basic types as shown in Fig. In the figure, the dashed lines represent the pre-sag voltage, and the solid lines represent the voltages during sag. The pre-sag voltages are given by V j , and during sag voltages by V0 j ,where j = a, b, and c. A single phase fault causes voltage sag in one phase (type B) at the terminals of a star connected load and in two phases (type C) at the terminals of a delta connected load. A phase-to-phase fault causes type C sag at the terminals of a star connected load and type D sag at the terminals of a delta connected load. A three phase symmetrical sag (type A) is caused by three phase fault. Further, voltage sag gets transformed into other sag types as it propagates in power system to lower voltage levels through transformers. Transformation of a voltage sag due to single phase fault i.e. type B sag, is illustrated in Fig. The type B sag when propagates through a star-delta transformer it transforms to a type C sag. When type C sag in-turn propagates through a star-delta transformer, it transforms to a type D sag. Each sag type is further classified into three subtypes based on the phase(s) that is/are affected. The subtypes are represented by a, b or c subscript, for easy reference. For instance, sag type Ba and Da have voltage sag in phase-a; while for sag type Ca, the line voltage bc is faulty and phase- a is healthy. Characterization of each type of sag is done in terms of the type and the complex characteristic voltage (V0 ch). The characteristic voltage defines three phase voltage sag. The phase voltages as a function of the characteristic voltage and the pre-fault voltage (which is usually 1 p.u.) is given in Table IV for the basic four types [2].

 

REFERENCES

  • S. Vedam and M. S. Sarma, Power Quality: VAR Compensation in Power Systems. CRC press, 2009.
  • H. J. Bollen, Understanding Power Quality Problems. New York: IEEE press, 2000.
  • Mohseni, S. M. Islam, and M. A. Masoum, “Impacts of symmetrical and asymmetrical voltage sags on dfig-based wind turbines considering phase-angle jump, voltage recovery, and sag parameters,” IEEE Trans. Power Electron., vol. 26, no. 5, pp. 1587–1598, May 2011.
  • Massoud, S. Ahmed, P. Enjeti, and B. Williams, “Evaluation of a multilevel cascaded-type dynamic voltage restorer employing discontinuous space vector modulation,” IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2398–2410, Jul. 2010.
  • W. Li, D. Vilathgamuwa, F. Blaabjerg, and P. C. Loh, “A robust control scheme for medium-voltage-level dvr implementation,” IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 2249–2261, Aug. 2007.

Multilevel Cascaded-Type Dynamic Voltage Restorer with Fault Current Limiting Function

IEEE Transactions on Power Delivery, 2015 

ABSTRACT:

This paper presents a new multilevel cascaded-type dynamic voltage restorer (MCDVR) with fault current limiting function. This topology can operate in two operational modes: 1) compensation mode for voltage fluctuations and unbalances, and 2) short-circuit current limiting mode. The current limiting function of the MCDVR is performed by activating anti-parallel thyristors during the short-circuit fault, and deactivating them during normal operation. The mathematical model of the MCDVR system is also established in this paper. The control scheme design and optimal parameter selection are outlined based on the detailed theoretical analysis of the converter. The transient states of the MCDVR in both the compensation mode and current-limiting mode are also analyzed. Simulation results based on the PSCAD/EMTDC software and experimental results on a laboratory setup help to validate the proposed topology and the theoretical analysis.

 

KEYWORDS:

  1. Dynamic voltage restorer (DVR)
  2. Multilevel inverters
  3. Fault current limiter
  4. Voltage restoration

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

 

Fig. 1. Schematic diagram of the proposed MCDVR.

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation results of the MCDVR system. Top to bottom: (a) the supply voltage Us, (b) the load voltage UL, (c) the secondary voltage Udvr, (d) the load current IL, and (e) the dc-link voltage.

 

Fig. 3. Forward switching simulations of the MCDVR system, top to bottom: (a) the load current IL, (b) the current Iscr in the thyristor’s path, (c) the output current Idvr of the VSI, (d) the dc-link voltage Udc, and (e) the timing sequence

Fig. 4. Backward switching simulations of the MCDVR system, top to bottom: (a) the load current IL, (b) the current Iscr in the thyristor’s path, (c) the output current Idvr of the VSI, (d) the dc-link voltage Udc, and (e) the timing sequence.

 

CONCLUSION:

Cascaded multilevel inverters have been applied in the industry as a cost-effective means of series sag compensation. However, a large current will be induced into the VSI through a series transformer during faults, and this is harmful to the VSI and the other equipment in the grid. In this paper, the MCDVR was proposed to deal with voltage sags and short-circuit current faults. The MCDVR has not only the advantages of the H-bridge cascade inverter, but also reduces the secondary side current in the preliminary period of the fault. A mathematical model of this system was also established in this paper. A careful analysis of the transient state verified the feasibility of the proposed MCDVR. Based on the theoretical analysis, PSCAD/EMTDC simulations and the experimental results, we can conclude the following:

1) The H-bridge cascade inverter can be adopted to reduce the series transformation ratio and the secondary current during the preliminary period of the fault.

2) The transient state of the MCDVR system was introduced in great detail.

3) The proposed control method can limit fault current with two cycle. The consistencies between the simulation results and experimental results help to verify the proposed topology and theoretical analysis.

 

REFERENCES:

  • -S. Lam, M-C. Wong, and Y.-D. Han, “Voltage swell and overvoltage compensation with unidirectional power flow controlled dynamic voltage restorer,” IEEE Trans. Power Del., vol. 23, no. 4, pp. 2513-2521, Oct. 2008.
  • Jafari, S. B. Naderi, M. Tarafdar Hagh, M. Abapour, and S. H. Hosseini, “Voltage sag compensation of point of common coupling (PCC) using fault current limiter,” IEEE Trans. Power Del., vol. 26, no. 4, pp. 2638-2646, Oct. 2011.
  • Z. Peng and J. S. Lai, “A multilevel voltage-source converter with separate DC source for static var generation,” IEEE Trans. Ind. Applicat., vol. 32, no. 5, pp. 1130-1138, Sep./Oct. 1996.
  • K. Al-Hadidi, A. M. Gole, and D. A. Jacobson, “Minimum power operation of cascade inverter-based dynamic voltage restorer,” IEEE Trans. Power Del., vol. 23, no. 2, pp. 889-898, Apr. 2008.

Improving the Performance of Cascaded H-bridge based Interline Dynamic Voltage Restorer

IEEE Transactions on Power Delivery, 2015

 ABSTRACT:

 An interline dynamic voltage restorer (IDVR) is a new device for sag mitigation which is made of several dynamic voltage restorers (DVRs) with a common DC link, where each DVR is connected in series with a distribution feeder. During sag period, active power can be transferred from a feeder to another one and voltage sags with long durations can be mitigated. IDVR compensation capacity, however, depends greatly on the load power factor and a higher load power factor causes lower performance of IDVR. To overcome this limitation, a new idea is presented in this paper which allows to reduce the load power factor under sag condition, and therefore, the compensation capacity is increased. The proposed IDVR employs two cascaded H-bridge multilevel converters to inject AC voltage with lower THD and eliminates necessity to low-frequency isolation transformers in one side. The validity of the proposed configuration is verified by simulations in the PSCAD/EMTDC environment. Then, experimental results on a scaled-down IDVR are presented to confirm the theoretical and simulation results.

 

KEYWORDS:

  1. Back-to-back converter
  2. Cascaded H-bridge
  3. Interline dynamic voltage restorer

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Power circuit schematic of the IDVR with active power exchanging capability.

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.4p.u.

Fig.3. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.6p.u.

 

CONCLUSION:

In this paper, a new configuration has been proposed which not only improves the compensation capacity of the IDVR at high power factors, but also increases the performance of the compensator to mitigate deep sags at fairly moderate power factors. These advantages were achieved by decreasing the load power factor during sag condition. In this technique, the source voltages are sensed continuously and when the voltage sag is detected, the shunt reactances are switched into the circuit and decrease the load power factors to improve IDVR performance. Finally, the simulation and practical results on the CHB based IDVR confirmed the effectiveness of the proposed configuration and control scheme.

 

REFERENCES:

  • F. Comesana, D.F. Freijedo, J.D. Gandoy, O. Lopez, A.G. Yepes, J. Malvar, “Mitigation of voltage sags, imbalances and harmonics in sensitive industrial loads by means of a series power line conditioner” Electric Power systems Research 84 (2012) 20–30
  • [2] A. Felce, S. A. C. A. Inelectra, G. Matas, and Y. Da Silva, “Voltage Sag Analysis and Solution for an Industrial Plant with Embedded Induction Motors,” In Industry Applications Conference, 2004. 39th IAS Annual Meeting. Conference Record of the 2004 IEEE, vol. 4, pp. 2573-2578. IEEE, 2004.
  • [3] A. Sannino, M. G. Miller, and M. H. J. Bollen, “Overview of voltage sag mitigation”, IEEE Power Eng. Soc. Winter Meeting, vol. 4, pp.2872 -2878 2000
  • [4] E. Babaei, M. F. Kangarlu, and M. Sabahi, “Mitigation of voltage disturbances using dynamic voltage restorer based on direct converters,” IEEE Trans. Power Del., 25, no. 4, pp. 2676–2683, Oct. 2010
  • [5] H. K. Al-Hadidi , A. M. Gole and D. A. Jacobson “A novel configuration for a cascade inverter-based dynamic voltage restorer with reduced energy storage requirements“, IEEE Trans. Power Del., vol. 23, no. 2, pp.881 -888 2008 .

 

A Two Degrees of Freedom Resonant Control Scheme for Voltage Sag Compensation in Dynamic Voltage Restorers

 

 IEEE Transactions on Power Electronics, 2017

ABSTRACT:

This paper presents a two degrees of freedom (2DOF) control scheme for voltage compensation in a dynamic voltage restorer (DVR). It commences with the model of the DVR power circuit, which is the starting point for the control design procedure. The control scheme is based on a 2DOF structure implemented in a stationary reference frame (α−β), with two nested controllers used to obtain a pass-band behavior of the closed-loop transfer function, and is capable of achieving both a balanced and an unbalanced voltage sag compensation. The 2DOF control has certain advantages with regard to traditional control methods, such as the possibility of ensuring that all the poles of the closed-loop transfer function are chosen without the need for observers and reducing the number of variables to be measured. The use of the well-known double control- loop schemes which employ feedback current controllers to reduce the resonance of the plant is, therefore, unnecessary. A simple control methodology permits the dynamic behavior of the system to be controlled and completely defines the location of the poles. Furthermore, extensive simulations and experimental results obtained using a 5 kW DVR laboratory prototype show the good performance of the proposed control strategy.

 

KEYWORDS:

  1. Power Quality
  2. Dynamic Voltage Restorer (DVR)
  3. Control Design
  4. Resonant Controller
  5. Stationary Frame Controller
  6. Voltage Sag.

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1. Power system with a DVR included.

 

EXPECTED SIMULATION RESULTS:

 

Figure 2. DVR simulation for a balanced voltage sag. (a) Line-to-neutral three-phase voltages at PCC, (b) line-to-neutral voltages generated by the DVR, (c) line-to-neutral load voltages, and (d) error signal in α − β (redblue).

Figure 3 DVR simulation for an unbalanced voltage sag. (a) Line-to-neutral three-phase voltages at PCC, (b) line-to-neutral voltages generated by the DVR, (c) line-to-neutral load voltages, and (d) error signal in α − β (redblue).

Figure 4. DVR simulation for a 30 % balanced voltage sag. (a) Line-to neutral three-phase voltages at PCC, (b) error signal in α − β (red-blue) for the 2DOF-Resonant scheme, (c) error signal in α − β (red-blue) for double loop scheme, and (d) error signal in α−β (red-blue) for the double-loop with Posicast scheme.

Figure 5. DVR simulation for a 30 % type-E unbalanced voltage sag. (a) Line-to-neutral three-phase voltages at PCC, (b) error signal in α − β (redblue) for the 2DOF-Resonant scheme, (c) error signal in α − β (red blue) for double-loop scheme, and (d) error signal in α − β (red-blue) for the double-loop with Posicast scheme.

 

 CONCLUSION:

This paper presents a control scheme based on two nested controllers for voltage sag compensation in a DVR. The nested regulators provide the control with two degrees of freedom, and the control scheme is implemented in the stationary reference frame. Furthermore, in order to accomplish the requirements for voltage sag compensation, it is necessary to track the component at the fundamental frequency. This is achieved using a resonant term in one of the controllers. The proposed control design methodology is able to define all the poles of the closed-loop system without observers and with a reduction in the number of variables that must be measured, thus making it possible to avoid the use of the traditional current loop employed in control schemes for the DVR. The structure with the nested regulators achieves perfect zero tracking error at the nominal frequency and blocks the DC offset, signifying that it has some advantages over other control methods, such as double-loop schemes with proportional-resonant regulators. Moreover, the design methodology is thoroughly explained when the delay in the calculations is taken into account.

In this case, the design procedure allows the dominant poles of the closed-loop system to be chosen. If the closed-loop poles are chosen carefully, this control structure can also be applied to other systems which require higher delays, e.g., power converter applications with a reduced switching frequency. The design methodology can additionally be extended to the discrete domain. Comprehensive simulated and experimental results corroborate the performance of the 2DOF-Resonant control scheme for balanced and unbalanced voltage sags. The proposed control scheme is able to compensate both types of voltage sags with a very fast transient response and an accurate tracking of the reference voltage, even when the different types of loads and frequency deviations of the grid voltages are considered. Extended comparisons with a PR controller using a double-loop scheme and a PR controller in a double loop with a Posicast regulator have been carried out, demonstrating that the performance of the 2DOF-Resonant controller is superior in all cases. Moreover, the study of the stability as regards parameter variations for the compared control schemes demonstrates the more robust behavior of the 2DOF-Resonant control scheme.

 

REFERENCES:

  • H. M. Quezada, J. R. Abbad, and T. G. S. Rom´an, “Assessment of energy distribution losses for increasing penetration of distributed generation,” IEEE Transactions on Power Systems, vol. 21, no. 2, pp. 533–540, May 2006.
  • K. Jukan, A. Jukan, and A. Toki´c, “Identification and assessment of key risks and power quality issues in liberalized electricity markets in europe,” International Journal of Engineering & Technology, vol. 11, no. 03, pp. 20–26, 2011.
  • EN-50160, European Standard EN-50160. Voltage Characteristics of Public Distribution Systems, CENELEC Std., November 1999.
  • 1547, IEEE Std. 1547-2003. Standard for Interconnecting Distributed Resources with Electric Power Systems, IEEE Std., June 2003.
  • P. Mahela and A. G. Shaik, “Topological aspects of power quality improvement techniques: A comprehensive overview,” Renewable and Sustainable Energy Reviews, vol. 58, pp. 1129–1142, May 2016.

Design and Evaluation of a Mini-Size SMES Magnet for Hybrid Energy Storage Application in a kW-Class Dynamic Voltage Restorer

IEEE Transactions on Applied Superconductivity, 2017

ABSTRACT:

This paper presents the design and evaluation of a mini-size GdBCO magnet for hybrid energy storage (HES) application in a kW-class dynamic voltage restorer (DVR). The HES-based DVR concept integrates with one fast-response highpower superconducting magnetic energy storage (SMES) unit and one low-cost high-capacity battery energy storage (BES) unit. Structural design, fabrication process and finite-elementmodeling (FEM) simulation of a 3.25 mH/240 A SMES magnet wound by state-of-the-art GdBCO tapes in SuNAM are presented. To avoid the internal soldering junctions and enhance the critical current of the magnet simultaneously, an improved continuous disk winding (CDW) method is proposed by introducing different gaps between adjacent single-pancake coil layers inside the magnet. About 4.41% increment in critical current and about 3.42% increment in energy storage capacity are demonstrated compared to a conventional CDW method. By integrating a 40 V/100 Ah valve-regulated lead-acid (VRLA) battery, the SMES magnet is applied to form a laboratory HES device for designing the kW-class DVR. For protecting a 380 V/5 kW sensitive load from 50% voltage sag, the SMES unit in the HES based scheme is demonstrated to avoid an initial discharge time delay of about 2.5 ms and a rushing discharging current of about 149.15 A in the sole BES based scheme, and the BES unit  is more economically feasible than the sole SMES based scheme for extending the compensation time duration.

KEYWORDS:

  1. Superconducting magnetic energy storage (SMES)
  2. SMES magnet design, hybrid energy storage (HES)
  3. Battery energy storage (BES)
  4. Continuous disk winding (CDW)
  5. Dynamic voltage restorer (DVR)
  6. Voltage sag compensation

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. Circuit topology of the HES-based DVR.

 EXPECTED SIMULATION RESULTS:

 

 Fig. 2. Transient voltage curves: (a) Load voltage before compensation; (b) Compensation voltage from the DVR; (c) Load voltage after compensation.

Fig. 3. Transient voltage curves: (a) Load voltage before compensation; (b) Compensation voltage from the DVR; (c) Load voltage after compensation.

CONCLUSION:

The structural design, fabrication process and FEM simulation of a 3.25 mH/240 A SMES magnet wound by state-of-the-art GdBCO tapes have been presented in this paper. The FEM simulation results have proved the performance enhancements in both the critical current and energy storage capacity by using the improved CDW scheme. Such a mini-size SMES magnet having relatively high power and low energy storage capacity is further applied to combine with a 40 V/100 Ah VRLA battery for developing a laboratory HES device in a kW-class DVR. In a 5 Kw sensitive load applications case, voltage sag compensation characteristics of three different DVR schemes by using a sole SMES system, a sole BES system and a SMES-BES-based HES device have been discussed and compared. With the fast-response high-power SMES, the maximum output current from the BES system is reduced from about 149.15 A in the BES-based DVR to 62.5 A in the HES-based DVR, and the drawback from the initial discharge time delay caused by the inevitable energy conversion process is offset by integrating the SMES system. With the low-cost high-capacity BES, practical compensation time duration is extended from about 32 ms in the SMES-based DVR to a longer duration determined by the BES capacity. Therefore, the proposed HES concept integrated with fast-response high-power SMES unit and low-cost high-capacity BES unit can be well expected to apply in practical large-scale DVR developments and other similar SMES applications.

REFERENCES:

[1] Mohd. H. Ali, B. Wu, and R. A. Dougal, “An overview of SMES applications in power and energy systems,” IEEE Trans. Sustainable Energy, vol. 1, no. 1, pp. 38-47, 2010.

[2] X. Y. Chen et al., “Integrated SMES technology for modern power system and future smart grid,” IEEE Trans. Appl. Supercond., vol. 24, no. 5, Oct. 2014, Art. ID 3801605.

[3] IEEE Std 1159-2009, IEEE Recommended Practice for Monitoring Electric Power Quality, 2009.

[4] X. H. Jiang et al., “A 150 kVA/0.3 MJ SMES voltage sag compensation system,” IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 1903-1906, Jun. 2005.

[5] S. Nagaya et al., “Field test results of the 5 MVA SMES system for bridging instantaneous voltage dips,” IEEE Trans. Appl. Supercond., vol. 16, no. 2, pp. 632-635, Jun. 2006.

A Filterless Single-Phase AC-AC Converter Based on Coupled Inductors with Safe-Commutation Strategy and Continuous Input Current

2017, IEEE

ABSTRACT: A novel single phase ac-ac converter with no LC input/output filters is presented in this paper. The proposed converter has all the advantages of the previous single phase impedance source ac-ac converters; it can operate in buck/boost and in-phase/out-of phase with the input voltage, that makes it appropriate for voltage sags/swells compensator without any dc storage. A coupled transformer based on T-structure is utilized to give an opportunity to access desired output voltage with various duty cycles. In this topology snubber circuit is not required, because a safe commutation strategy enables to eliminate voltage and current spikes produced by short-circuit path. In addition, the converter performs in continuous current mode, so there is no inrush current. Also, the characteristic which the output voltage reverses or maintains phase angle with the input voltage is supported well, because the input and output share the same ground. Eventually, circuit analysis, operating principles and simulation results in MATLAB/SIMULINK are presented to verify the performance of the converter.

KEYWORDS:

  1. Continuous input current
  2. T-source
  3. Safe commutaion strategy
  4. Ground sharing
  5. Dynamic voltage restorer (DVR)

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

 

Fig. 1. Filterless single-phase T-source ac-ac converter

 EXPECTED SIMULATION RESULTS:

 

Fig. 2. Simulation results of the proposed converter in boost in-phase mode at D = 0.9, R=10 Ω and n = 2, input/output voltage, c2 voltage, output current, input current.

Fig. 3. Simulation result of the proposed converter in boost in-phase mode at D = 0.9, R=20 Ω and n = 2, output current waveform

Fig. 4. Simulation results of the proposed converter in boost in-phase mode at D = 0.9, R=10 Ω and n = 3, input/output voltage, output current, input current

Fig. 5. Simulation results of the proposed converter in buck out-of-phase mode at D = 0.2, R=10 Ω and n = 2, input/output voltage, output current

CONCLUSION:

In this study, a single phase T-source ac-ac converter has been introduced. The novel topology operates in continuous current mode and low THD, with no filters in input and output. With consider of this point, some privileges rise up such as declining in size and reducing in cost of the converter. Also, output voltage enables to reverse or sustain the phase angle relevant to input voltage greatly, because of the common ground. In addition, a safe commutation strategy is usedto prevent appearance of voltage spikes and current spikes, so it leads to the converter could be designed without any snubber circuits in bidirectional switches. The presence of a coupled transformer based on T- structure in the topology gives this permission to converter that operates in a wider range of duty cycles control. Furthermore, by using of T-source in this topology, desirable voltage gain has been obtained in small conducting duration, which leads to increase efficiency and decrease losses considerably. Moreover, this converter can be applied for DVR devices with utilizing buck-boost feature to compensate various voltage sags and voltage swells. Eventually, accuracy performance and theoretical results of the converter have been verified with consequences of the simulation.

REFERENCES:

[1] X. Liu, P.Wang, P. C. Loh, and F. Blaabjerg, “A three-phase dual-input matrix converter for grid integration of two AC type energy resources,” IEEE Trans. Ind. Electron., vol. 60, no. 1, pp. 20–30, Jan. 2013.

[2] Y. W. Li, F. Blaabjerg, D. M. Vilathgamuwa, and P. C. Loh, “Design and comparison of high performance stationary-frame controllers for DVR implementation,” IEEE Trans. Power Electron., vol. 22, no.2, pp.602-612, March 2007.

[3] T. Friedli, J.W. Kolar, J. Rodriguez, and P.W. Wheeler, “Comparative Evaluation of Three-Phase AC–AC Matrix Converter and Voltage DC-Link Back-to-Back Converter Systems,” IEEE Trans. Ind. Electron., vol. 59, no.12, pp. 4487 – 4510, Dec. 2012.

[4] L. Empringham, J.W. Kolar, J. Rodriguez, and P.W. Wheeler, “Technological Issues and Industrial Application of Matrix Converters: A Review, ” IEEE Trans. Ind. Electron., vol. 60, no. 10, pp. 4260-4271, May 2013.

[5] O. Ellabban, H. Abu-Rub, and Ge Baoming, “Field oriented control of an induction motor fed by a quasi-Z-source direct matrix converter, ” in Proc. IEEE 39th Ann. Conf. Ind. Electron. Society, pp. 4850-4855, Vienna, 2013.

A Superconducting Magnetic Energy Storage- Emulator/Battery Supported Dynamic Voltage Restorer

IEEE Transactions on Energy Conversion, 2016

ABSTRACT: This study examines the use of superconducting magnetic and battery hybrid energy storage to compensate grid voltage fluctuations. The superconducting magnetic energy storage system (SMES) has been emulated by a high current inductor to investigate a system employing both SMES and battery energy storage experimentally. The design of the laboratory prototype is described in detail, which consists of a series-connected three phase voltage source inverter used to regulate AC voltage, and two bidirectional DC/DC converters used to control energy storage system charge and discharge. ‘DC bus level signaling’ and ‘voltage droop control’ have been used to automatically control power from the magnetic energy storage system during short-duration, high power voltage sags, while the battery is used to provide power during longer-term, low power under-voltages. Energy storage system hybridisation is shown to be advantageous by reducing battery peak power demand compared with a battery-only system, and by improving long term voltage support capability compared with a SMES-only system. Consequently, the SMES/battery hybrid DVR can support both short term high-power voltage sags and long term under voltages with significantly reduced superconducting material cost compared with a SMES-based system.

KEYWORDS:

  1. Dynamic Voltage Restorer (DVR)
  2. Energy Storage Integration
  3. Sag
  4. Superconducting Magnetic Energy Storage
  5. Battery

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Figure 1. Hybrid energy storage DVR system configuration.

EXPECTED SIMULATION RESULTS:

Figure 2. Simulated PLL Algorithm results: (a) Simulated voltage sag with phase jump (b) Phase jump angle (c) Blue trace: supply phase angle. Red trace: PLL output: ‘Pre-sag compensation’ with controller gains: kp = 0.5, ki = 5, (d) Blue trace: supply phase angle. Red trace: PLL output: ‘In phase compensation’ with controller gains kp = 200, ki = 50.

Figure 3. Hybrid System Experimental results: 0.1s Three phase sag to 35% of nominal voltage. (a) Supply voltages (b) Load voltages (c) DC Link Voltage (d) Battery Current (e) SMES-inductor current.

Figure 4. Battery System Experimental results: 0.1s Three phase sag to 35% of nominal voltage. (a) Supply voltages (b) Load voltages (c) DC Link Voltage (d) Battery Current.

 

Figure 5. Hybrid System Experimental results: Long-term three phase under voltage (a) RMS supply phase-voltage. (b) RMS load phase-voltage (c) DC Bus Voltage (d) Battery Current (e) SMES-inductor current.

 CONCLUSION:

The performance a novel hybrid DVR system topology has been assessed experimentally and shown to effectively provide voltage compensation for short-term sags and long-term under-voltages. A prototype system has been developed which demonstrates an effective method of interfacing SMES and battery energy storage systems to support a three phase load. The system has been shown to autonomously prioritise the use of the short-term energy storage system to support the load during deep, short-term voltage sags and a battery for lower depth, long-term under-voltages. This can have benefits in terms of improved voltage support capability and reduced costs compared with a SMES-based system. Additional benefits include reduced battery power rating requirement and an expected improvement in battery life compared with a battery-only system due to reduced battery power cycling and peak discharge power.

REFERENCES:

[1] P.K. Ray, S.R. Mohanty, N. Kishor, and J.P.S. Catalao, “Optimal Feature and Decision Tree-Based Classification of Power Quality Disturbances in Distributed Generation Systems,” Sustainable Energy, IEEE Trans., vol. 5, Sept. 2014, pp. 200-208.

[2] D. Novosel, G. Bartok, G. Henneberg, P. Mysore, D. Tziouvaras, and S. Ward, “IEEE PSRC Report on Performance of Relaying During Wide-Area Stressed Conditions,” Power Delivery, IEEE Trans., vol. 25, Jan. 2010, pp. 3-16.

[3] “IEEE Recommended Practice for Monitoring Electric Power Quality,” in IEEE Std 1159-1995, ed. New York, NY: IEEE Standards Board, 1995, p. i.

[4] S. Jothibasu and M.K. Mishra, “A Control Scheme for Storageless DVR Based on Characterization of Voltage Sags,” Power Delivery, IEEE Trans., vol. 29, July 2014, pp. 2261-2269.