A Multilevel Inverter Structure based on Combination of Switched-Capacitors and DC Sources

ABSTRACT:  

This paper presents a switched-capacitor multilevel inverter (SCMLI) combined with multiple asymmetric DC sources. The main advantage of proposed inverter with similar cascaded MLIs is reducing the number of isolated DC sources and replacing them with capacitors. A self-balanced asymmetrical charging pattern is introduced in order to boost the voltage and create more voltage levels. Number of circuit components such as active switches, diodes, capacitors, drivers and DC sources reduces in proposed structure.

This multi-stage hybrid MLI increases the total voltage of used DC sources by multiple charging of the capacitors stage by stage. A bipolar output voltage can be inherently achieved in this structure without using single phase H-bridge inverter which was used in traditional SCMLIs to generate negative voltage levels. This eliminates requirements of high voltage rating elements to achieve negative voltage levels. A 55-level step-up output voltage (27 positive levels, a zero level and 27 negative levels) are achieved by a 3-stage system which uses only 3 asymmetrical DC sources (with amplitude of 1Vin, 2Vin and 3Vin) and 7 capacitors (self-balanced as multiples of 1Vin). MATLAB/SIMULINK simulation results and experimental tests are given to validate the performance of proposed circuit.

KEYWORDS:
  1. Multi-level inverter
  2. Switched-capacitor
  3. Bipolar converter
  4. Asymmetrical
  5. Self-balancing

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig (1) Three stage structure of the proposed inverter

 EXPECTED SIMULATION RESULTS:

 

 Fig (2) Waveform of the output voltage in (a) 50Hz and pure resistive load (b)

the inset graphs of voltage and current

 Fig (3) waveform of the output voltage in 50Hz with resistive-inductive load

 Fig (4) Capacitor’s voltage in 50Hz (a) middle stage (b) last stage

CONCLUSION:

 In this paper, a multilevel inverter based on combination of multiple DC sources and switched-capacitors is presented. Unlike traditional converters which used H-bridge cell to produce negative voltage that the switches should withstand maximum output AC voltage, the suggested structure has the ability of generating bipolar voltage (positive, zero and negative), inherently. Operating principle of the proposed SCMLI in charging and discharging is carried out.

Also, evaluation of reliability has been done and because of high number of redundancy, there has been many alternative switching states which help the proposed structure operate correctly even in fault conditions. For confirming the superiority than others, a comprehensive comparison in case of number of devices and efficiency is carried out and shows that the proposed topology has better performance than others. For validating the performance, simulation and experimental results are brought under introduced offline PWM control method.

REFERENCES:

[1] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Trans. Ind. Electron. Mag., vol. 2, no. 2, pp. 28–39, June, 2008.

[2] M. Saeedifard, P. M. Barbosa and P. K. Steimer,”Operation and Control of a Hybrid seven Level Converter,” IEEE Trans. Power Electron., vol. 27, no.2, pp. 652–660, February, 2012.

[3] A. Nami. “A New Multilevel Converter Configuration for High Power High Quality Application,” PhD Thesis, Queensland University of Technology, 2010.

[4] V. Dargahi, A. K. Sadigh, M. Abarzadeh, S. Eskandari and K. Corzine, “A new family of modular multilevel converter based on modified flying capacitor multicell converters IEEE Trans. Power Electron., vol. 30, no.

1, pp. 138-147, January, 2015.

[5] I. López, S. Ceballos, J. Pou, J. Zaragoza, J. Andreu, I. Kortabarria and V. G. Agelidis,” Modulation strategy for multiphase Neutral-Point Clamped converters,” IEEE Trans. Power Electron., vol. 31, no. 2, pp. 928–941, March, 2015.

A Novel Multilevel Inverter Based on Switched DC Sources

ABSTRACT:  

This paper presents a multilevel invert er that has been conceptualized to reduce component count, particularly for a large number of output levels. It comprises floating input dc sources alternately connected in opposite polarities with one another through power switches whereas each input dc level appears in the stepped load voltage either individually or in additive combinations with other input levels. This approach results in reduced number of power switches as compared to classical to p o log i e s. A single-phase five-level invert er demonstrates the working principle of the proposed topology. The simulation investigates the topology and an exhaustive comparison of the proposed topology is made against the classical cascaded H-bridge topology.

 SOFTWARE: MAT LAB/SIM U LINK

 CIRCUIT DIAGRAM:

 

Fig. 1. Single-phase invert er based on the proposed topology with two input sources.

 EXPECTED SIMULATION RESULTS:

 

 Fig. 2. (a) Reference and carrier wave forms for the proposed scheme for a five-level output. (b) Aggregated signal “a(t).”

Fig. 3. Switching pulse pattern for the five-level invert er.

Fig. 4. Simulation results. (a) Five-level voltage output. (b) Harmonic spectrum of the load voltage.

Fig. 5. Simulation results. (a) Load current waveform with an R L load (R =

2 Ω and L = 2 m H). (b) Harmonic spectrum of the load current.

 

CONCLUSION:

As M LI s are gaining interest, efforts are being directed toward reducing the device count for increased number of output levels, therefore A novel topology for M LI s has been proposed in this paper to reduce the device count. The working principle of the proposed topology has been explained, and mathematical formulations corresponding to output voltage, source currents, voltage stresses on switches, and power losses have been developed. Simulation studies performed on a five-level invert er based on the proposed structure have been validated experimentally.

Comparison

Comparison of the proposed topology with conventional top o l o g i es reveals that the proposed topology significantly reduces the number of power switches and associated gate driver circuits. Analytical comparisons on the basis of losses and switch cost indicate that the proposed topology is highly competitive. The proposed topology can be effectively employed for applications where isolated dc sources are available. The advantage of the reduction in the device count, however, imposes two limitations: 1) requirement of isolated dc sources as is the case with the C H B topology and 2) curtailed modular it y  and fault-tolerant capabilities as compared to the C H B topology.

REFERENCES

[1]S. K o u r o, M. Malinowski, K. Go pa k u m a r, J. P o u, L. Fran q u e lo, B. Wu, J. Rodriguez, M. Perez, and J. Leon, “Recent advances and industrial
applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57,
no. 8, pp. 2553–2580, Aug. 2010.
[2] G. But i c chi, E. Loren z an i, and G. France s chin i, “A five-level single-phase
grid-connected converter for renewable distributed systems,” IEEE Trans.
Ind. Electron., vol. 60, no. 3, pp. 906–918, Mar. 2013.

[3] J. Rodriguez, J.-S. La i, and F. Z h en g Peng, “Multilevel invert er s: A survey
of top o log i es, controls, applications,” IEEE Trans. Ind. Electron., vol. 49,
no. 4, pp. 724–738, Aug. 2002.
[4] S. De, D. Banerjee, K. Siva Kumar, K. Gopakumar, R. Ramchand, and
C. Patel, “Multilevel inverters for low-power application,” IET Power
Electronics, vol. 4, no. 4, pp. 384–392, Apr. 2011.
[5] M. Malinowski, K. Gopakumar, J. Rodriguez, and M. A. Pérez, “A survey
on cascaded multilevel inverters,” IEEE Trans. Ind. Electron., vol. 57,
no. 7, pp. 2197–2206, Jul. 2010

A Three-Phase Symmetrical DC-Link Multilevel Inverter with Reduced Number of DC Sources

ABSTRACT:

This paper presents a novel three-phase DC-link multilevel inverter topology with reduced number of input DC power supplies. The proposed inverter consists of series-connected half-bridge modules to generate the multilevel waveform and a simple H-bridge module, acting as a polarity generator. The inverter output voltage is transferred to the load through a three-phase transformer, which facilitates a galvanic isolation between the inverter and the load. The proposed topology features many advantages when compared with the conventional multilevel inverters proposed in the literatures. These features include scalability, simple control, reduced number of DC voltage sources and less devices count. A simple sinusoidal pulse-width modulation technique is employed to control the proposed inverter. The performance of the inverter is evaluated under different loading conditions and a comparison with some existing topologies is also presented. The feasibility and effectiveness of the proposed inverter are confirmed through simulation and experimental studies using a scaled down low-voltage laboratory prototype.

 

KEYWORDS:

  1. Hybrid multilevel inverter
  2. DC-link inverter
  3. Half-bridge module
  4. Symmetric DC voltage supply

SOFTWARE: MATLAB/SIMULINK

 

CIRCUIT DIAGRAM:

Fig. 1. The proposed three-phase CMLI with two half-bridge cells per phase leg 

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Simulation results of the output line voltages and line currents for (a) load of nearly 0.8–lagging power factor and (b) load of nearly unity power factor

Fig. 3. Simulation results for a dynamic change in the load from nearly unity PF (100.31∠4.49°Ω) to 0.8 lagging PF (127.13∠38.13°Ω): (a) level generator output voltage, (b) polarity generator output voltage (phase voltage) and (c) line voltage and line current

Fig. 4 Simulation results for a dynamic change in the load from nearly 0.9 lagging PF (108.01∠22.21°Ω) to 0.7 lagging PF (142.88∠45.58°Ω): (a) level generator output voltage, (b) polarity generator output voltage (phase voltage) and (c) line voltage and line current

Fig. 5 Simulation results for a dynamic change in the load magnitude with the same PF: (a) Line voltage, (b) Line current

Fig. 6 Simulation results for carrier frequency of 8 kHz: (a) line voltages and currents, (b) line current THD, (c) line voltage THD

 

CONCLUSION:

This paper presents a new symmetrical multilevel inverter topology with two different stages. The proposed inverter requires less power electronic devices and features modularity, hence simple structure, less cost, and high scalability. The number of input DC-supplies for the proposed topology is found to be nearly 67% less than the similar symmetric half-bridge topologies, which is a great achievement for industrial applications. This phenomenon will reduce the complexity of DC voltage management. As being a symmetric structure, all the switching devices experience same voltage stress, which is a very important factor for high voltage applications. The feasibility of the proposed inverter is confirmed through simulation and experimental analysis for different operating conditions.

 

REFERENCES:

  • G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. Prats, “The age of multilevel converters arrives,” IEEE Ind. Electron. magazine, vol. 2, pp. 28-39, 2008.
  • Nabae, I. Takahashi, and H. Akagi, “A new neutral-point-clamped PWM inverter,” IEEE Trans. Ind. Appl., pp. 518-523, 1981.
  • Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, et al., “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, pp. 2553-2580, 2010.
  • Rodriguez, J.-S. Lai, and F. Z. Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” IEEE Trans. Ind. Electron., vol. 49, pp. 724-738, 2002.
  • Xiao, L. Hang, J. Mei, C. Riley, L. M. Tolbert, and B. Ozpineci, “Modular cascaded H-bridge multilevel PV inverter with distributed MPPT for grid-connected applications,” IEEE Trans. Ind. Appl., vol. 51, pp. 1722-1731, 2015.