A Highly Efficient and Reliable Inverter Configuration Based Cascaded Multi-Level Inverter for PV Systems

ABSTRACT:  

This paper presents an improved Cascaded Multi-Level Inverter (CMLI) based on a highly efficient and reliable configuration for the minimization of the leakage current. Apart from a reduced switch count, the proposed scheme has additional features of low switching and conduction losses. The proposed topology with the given PWM technique reduces the high-frequency voltage transitions in the terminal and common-mode voltages. Avoiding high-frequency voltage transitions achieves the minimization of the leakage current and reduction in the size of EMI filters. Furthermore, the extension of the proposed CMLI along with the PWM technique for 2m+1 levels is also presented, where m represents the number of Photo Voltaic (PV) sources.

The proposed PWM technique requires only a single carrier wave for all 2m+1 levels of operation. The Total Harmonic Distortion (THD) of the grid current for the proposed CMLI meets the requirements of IEEE 1547 standard. A comparison of the proposed CMLI with the existing PV Multi-Level Inverter (MLI) topologies is also presented in the paper. Complete details of the analysis of PV terminal and common-mode voltages of the proposed CMLI using switching function concept, simulations, and experimental results are presented in the paper.

KEYWORDS:
  1. Cascaded multi-level inverter
  2. Leakage current
  3. Common-mode voltage
  4. Terminal voltage

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

 

Fig. 1. Proposed five-level grid-connected CMLI with PV and parasitic elements.

EXPECTED SIMULATION RESULTS:

 

Fig. 2. Simulation results of proposed five-level CMLI showing the waveforms of : (a) output voltage vuv; (b) grid current iac; (c) terminal voltage vxg; (d) terminal voltage vyg; (e) terminal voltage vzg; (f) leakage current ileak; (g) common-mode voltage vcm.

Fig. 3. Proposed five-level CMLI integrated with MPPT. The subplots give waveforms of : (a) voltage VPV1; (b) voltage VPV2; (c) current IPV1; (d) current IPV2; (e) power PPV1; (f) power PPV2; (g) resultant modulation index ma; (h) output power POUT; (i) modified reference wave vref_modified; (j) inverter output voltage vab.

CONCLUSION:

 In this paper, an improved five-level CMLI with low switch count for the minimization of leakage current in a transformerless PV system is proposed. The proposed CMLI minimizes the leakage current by eliminating the high-frequency transitions in the terminal and common-mode voltages. The proposed topology also has reduced conduction and switching losses which makes it possible to operate the CMLI at high switching frequency.

Furthermore, the solution for generalized 2m+1 levels CMLI is also presented in the paper. The given PWM technique requires only one carrier wave for the generation of 2m+1 levels. The operation, analysis of terminal and common-mode voltages for the CMLI is also presented in the paper. The simulation and experimental results validate the analysis carried out in this paper. The MPPT algorithm is also integrated with the proposed five-level CMLI to extract the maximum power from the PV panels. The proposed CMLI is also compared with the other existing MLI topologies in Table V to show its advantages.

REFERENCES:

[1] Y. Tang, W. Yao, P.C. Loh and F. Blaabjerg, “Highly Reliable Transformerless Photovoltaic Inverters With Leakage Current and Pulsating Power Elimination,” IEEE Trans. Ind. Elect., vol. 63, no. 2, pp. 1016-1026, Feb. 2016.

[2] W. Li, Y. Gu, H. Luo, W. Cui, X. He and C. Xia, “Topology Review and Derivation Methodology of Single-Phase Transformerless Photovoltaic Inverters for Leakage Current Suppression,” IEEE Trans. Ind. Elect., vol. 62, no. 7, pp. 4537-4551, July 2015.

[3] J. Ji, W. Wu, Y. He, Z. Lin, F. Blaabjerg and H. S. H. Chung, “A Simple Differential Mode EMI Suppressor for the LLCL-Filter-Based Single-Phase Grid-Tied Transformerless Inverter,” IEEE Trans. Ind. Elect., vol. 62, no. 7, pp. 4141-4147, July 2015.

[4] Y. Bae and R.Y.Kim, “Suppression of Common-Mode Voltage Using a Multicentral Photovoltaic Inverter Topology With Synchronized PWM,” IEEE Trans. Ind. Elect., vol. 61, no. 9, pp. 4722-4733, Sept. 2014.

[5] N. Vazquez, M. Rosas, C. Hernandez, E. Vazquez and F. J. Perez-Pinal, “A New Common-Mode Transformerless Photovoltaic Inverter,” IEEE Trans. Ind. Elect., vol. 62, no. 10, pp. 6381-6391, Oct. 2015.

An Optimized Three Phase Multilevel Inverter Topology with Separate Level and Phase Sequence Generation Part

ABSTRACT:

This manuscript presents an optimized, 3-ϕ, multilevel (MLI) inverter topology.  cascading the level generation part with the phase sequence generation part derives  the proposed system. Further, it can be operated at any required level depending upon the configuration of the level generation part. Thus, for higher level operation extra components are required at the level generation part only. Therefore, number of components required for the proposed MLI is lower than the conventional 3-ϕ MLI topologies for higher level operation. Further, the level generation part is shared in the three phases equally. This eliminates the possibility of phase unbalance. The working principle and the operation of the proposed MLI are supported with the simulation and experimental validations. Further, the proposed optimized MLI is also compared with the conventional 3-ϕ MLIs to prove its advantage.

 KEYWORDS:

  1. 3-ϕ
  2. Multilevel inverter
  3. Common mode voltage
  4. New topology

 SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

Fig. 1. (a) Circuit schematic for the proposed m-level MLI. (b) Configuration of top/bottom BU.

EXPECTED SIMULATION RESULTS:

 

Fig 2. Simulation results showing the (a) line to line voltages, (b) Output voltage of top BU, (c) output voltage of bottom BU, (d) phase to neutral voltages and (e) load current waveforms of the proposed 3-ϕ MLI in symmetrical operation.

CONCLUSION:

This paper presents an optimized 3-ϕ MLI configuration with reduced number of component. The prominent features of the proposed MLI are as follows.

1) Cascading LGP and PSGP builds the proposed MLI configuration. 

2) For higher level operation only switches required are at the BUs only which resides in the LGP. This reduces the requirement of extra devices compared to conventional topologies.

3) Also, each dc voltage source in the presented MLI topology is equally shared by all the phases. Thus, any chance of inter-phase asymmetry is avoided.

The above mentioned points support that the proposed MLI is an optimized configuration for 3-ϕ operation with reduced number of switches. However, the proposed configuration is operated by using the SVs up-to the red line only. The regular paper presents the further work with an improved PWM strategy which takes all the SVs in account . This will further increase the number of levels at the output and linearity can be maintained in over-modulation region with improved dc-bus utilization.

REFERENCES:

[1] J. Rodriguez, J. La i and F. Z. Pen g, “Multilevel invert er s: a survey of top o lo  g i es, controls, and applications,” IEEE Trans. Ind. Elect., vol. 49, no. 4, pp. 724-738, Aug. 2002.

[2] K. K. Gupta, A. Ran j an, P. B hat nag a r, L. K. S a h u and S. Jain, “Multilevel Invert er Top o l o g i es With Reduced Device Count: A Review,” IEEE Trans. Power Elect., vol. 31, no. 1, pp. 135-151, Jan. 2016.

[3] Wu, Bin, and Meh d i N a r i man i. High-power converters and AC drives. John Wiley & Sons, 2016.

[4] S. S. Fa z e l, S. Be r net, D. K rug and K. J a l i l i, “Design and Comparison of 4-k V Neutral-Point-Clamped, Flying-Capacitor, and Series-Connected H-Bridge Multilevel Converters,” IEEE Trans. Ind. A p pl., vol. 43, no. 4, pp. 1032-1040, July-a u g. 2007.

[5] L. Wang, D. Zhang, Y. Wang, B. Wu and H. S. At ha b, “Power and Voltage Balance Control of a Novel Three-Phase Solid-State Transformer Using Multilevel Cascaded H-Bridge Invert er s for Micro grid Applications,” in IEEE Trans. Power Elect., vol. 31, no. 4, pp. 3289-3301, April 2016.

H6-type Single Phase Full-Bridge PV Grid-Tied Transformerless Inverters

ABSTRACT:
Photovoltaic (PV) generation systems are broadly employed in transformer less inverters, in order to produce the benefits of high efficiency and low cost. Safety want of leakage currents are met by request the various transformers less inverter topologies. In this paper, three transformer less inverter topologies are decorated such as a family of H6 transformer less inverter topologies with low leakage currents is planned, and the intrinsic relationship between H5 topology, highly efficient and reliable inverter concept (HERIC) topology.

H6 INVERTER

The proposed H6 topology has been discussed as well. For a detailed analysis with operation modes and modulation strategy one of the proposed H6 inverter topologies is captured as an example. Comparison among the HERIC, the H5, and the proposed H6 topologies is been done for the power device costs and power losses.

HERIC

For decide their performances in terms of power efficiency and leakage currents component, a universal prototype is built for these three topologies noticed. Simulation results show that the proposed HERIC topology and the H6 topology achieve similar performance in leakage currents, which is a little bad than that of the H5 topology, but it features higher ability than that of H5 topology.

KEYWORDS:
1. Common-mode voltage
2. Grid-tied inverter
3. Leakage current
4. Photovoltaic (PV) generation system
5. Transformerless inverter

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

image002

Fig. 1. Leakage current path for transformerless PV inverters

EXPECTED SIMULATION RESULTS:

image004 image006

Fig. 2. CM voltage and leakage current in H6 topology. (a) CM voltage. (b) Leakage current.

image008 image010

Fig. 3. Drain–source voltages in H6 topology. (a) Voltage stress on S5 and S6 . (b) Detailed waveforms.

image012

Fig. 4. DM characteristic of H6 topology.

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Fig. 5. Efficiency comparison of H5, HERIC and H6 topologies.

CONCLUSION:

In this paper, based on the H5 topology, a new current path is formed by inserting a power device between the terminals of PV array and the midpoint of one of bridge legs.

PV ARRAY

As a result, a family of single-phase transformerless full-bridge H6 inverter topologies with low leakage currents is derived. The proposed H6 topologies have the following advantages and evaluated by simulation results:

H6  TOPOLOGY

1) The conversion efficiency of the novel H6 topology is better than that of the H5 topology, and its thermal stress distribution is better than that of the H5 topology;
2) The leakage current is almost the same as HERIC topology, and meets the safety standard;
3) The excellent DM performance is achieved like the isolated full-bridge inverter with uniploar SPWM. Therefore, the proposed H6 topologies are good solutions for the single phase transformerless PV grid-tied inverters.

REFERENCES:
[1] S. B. Kjaer, J. K. Pederson, and F. Blaabjerg, “A review of single-phase grid-connected inverters for photovoltaic modules,” IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 1292–1306, Sep/Oct. 2005.
[2] F. Blaabjerg, Z. Chen, and S. B. Kjaer, “Power electronics as efficient interface in dispersed power generation systems,” IEEE Trans. Power Electron., vol. 19, no. 5, pp. 1184–1194, Sep. 2004.
[3] B. Sahan, A. N. Vergara, N. Henze, A. Engler, and P. Zacharias, “A single stage PVmodule integrated converter based on a low-power current source inverter,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2602–2609, Jul.2008.
[4] M. Calais, J. Myrzik, T. Spooner, and V. G. Agelidis, “Inverters for single phase grid connected photovoltaic systems—An overview,” in Proc. IEEE PESC, 2002, vol. 2, pp. 1995–2000.
[5] F. Blaabjerg, Z. Chen, and S. B. Kjaer, “Power electronics as efficient interface in dispersed power generation systems,” IEEE Trans. Power Electron., vol. 19, no. 5, pp. 1184–1194, Sep. 2004.