Improving the Performance of Cascaded H-bridge based Interline Dynamic Voltage Restorer

IEEE Transactions on Power Delivery, 2015

 ABSTRACT:

 An interline dynamic voltage restorer (IDVR) is a new device for sag mitigation which is made of several dynamic voltage restorers (DVRs) with a common DC link, where each DVR is connected in series with a distribution feeder. During sag period, active power can be transferred from a feeder to another one and voltage sags with long durations can be mitigated. IDVR compensation capacity, however, depends greatly on the load power factor and a higher load power factor causes lower performance of IDVR. To overcome this limitation, a new idea is presented in this paper which allows to reduce the load power factor under sag condition, and therefore, the compensation capacity is increased. The proposed IDVR employs two cascaded H-bridge multilevel converters to inject AC voltage with lower THD and eliminates necessity to low-frequency isolation transformers in one side. The validity of the proposed configuration is verified by simulations in the PSCAD/EMTDC environment. Then, experimental results on a scaled-down IDVR are presented to confirm the theoretical and simulation results.

 

KEYWORDS:

  1. Back-to-back converter
  2. Cascaded H-bridge
  3. Interline dynamic voltage restorer

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Power circuit schematic of the IDVR with active power exchanging capability.

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.4p.u.

Fig.3. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.6p.u.

 

CONCLUSION:

In this paper, a new configuration has been proposed which not only improves the compensation capacity of the IDVR at high power factors, but also increases the performance of the compensator to mitigate deep sags at fairly moderate power factors. These advantages were achieved by decreasing the load power factor during sag condition. In this technique, the source voltages are sensed continuously and when the voltage sag is detected, the shunt reactances are switched into the circuit and decrease the load power factors to improve IDVR performance. Finally, the simulation and practical results on the CHB based IDVR confirmed the effectiveness of the proposed configuration and control scheme.

 

REFERENCES:

  • F. Comesana, D.F. Freijedo, J.D. Gandoy, O. Lopez, A.G. Yepes, J. Malvar, “Mitigation of voltage sags, imbalances and harmonics in sensitive industrial loads by means of a series power line conditioner” Electric Power systems Research 84 (2012) 20–30
  • [2] A. Felce, S. A. C. A. Inelectra, G. Matas, and Y. Da Silva, “Voltage Sag Analysis and Solution for an Industrial Plant with Embedded Induction Motors,” In Industry Applications Conference, 2004. 39th IAS Annual Meeting. Conference Record of the 2004 IEEE, vol. 4, pp. 2573-2578. IEEE, 2004.
  • [3] A. Sannino, M. G. Miller, and M. H. J. Bollen, “Overview of voltage sag mitigation”, IEEE Power Eng. Soc. Winter Meeting, vol. 4, pp.2872 -2878 2000
  • [4] E. Babaei, M. F. Kangarlu, and M. Sabahi, “Mitigation of voltage disturbances using dynamic voltage restorer based on direct converters,” IEEE Trans. Power Del., 25, no. 4, pp. 2676–2683, Oct. 2010
  • [5] H. K. Al-Hadidi , A. M. Gole and D. A. Jacobson “A novel configuration for a cascade inverter-based dynamic voltage restorer with reduced energy storage requirements“, IEEE Trans. Power Del., vol. 23, no. 2, pp.881 -888 2008 .

 

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