Hybrid Cascaded Multilevel Inverter (HCMLI) with Improved Symmetrical 4-Level Submodule

 ABSTRACT:

This paper proposes an improved symmetrical 4-level submodule as a basic cell for generating multiple DC voltage levels. A hybrid cascaded multilevel inverter (HCMLI) topology is formed by the combination of n submodules and a full-bridge. A comparative analysis against the recent multilevel inverters reveals that the proposed topology requires less number of switches and DC sources. In addition, the proposed submodule reduces the number of conducting switch and gate driver requirements compared to the widely used half-bridge submodule. To validate the operation of the proposed HCMLI topology, experimental results of a 9-level single-phase inverter controlled by selective harmonic elimination pulse-width-modulation is presented.

 

KEYWORDS:

  1. Hybrid cascaded multilevel inverter
  2. Reduced switch count
  3. Symmetrical submodule

 

SOFTWARE: MATLAB/SIMULINK

  

CIRCUIT DIAGRAM:

Circuit diagram of the proposed MLI topology.

Fig. 1. Circuit diagram of the proposed MLI topology.

 

EXPECTED SIMULATION RESULTS:

Fig. 2. Experimental waveforms with four 30V DC supplies (R = 180Ω, L = 11mH), (a) output voltage and load current, (b) output voltage and voltages across switches in the proposed submodule.

Fig. 3. Experimental waveforms with four 12V battery sources, (a) R = 10Ω, L = 11mH, and (b) R = 10Ω.

 

CONCLUSION:

In this paper, the working concept of the proposed HCMLI with improved symmetrical 4-level submodule was discussed and verified through experimental study. The topology is highly compact with reduced switch count. Modularity is achieved by cascading the proposed submodule. Moreover, the submodule is superior compared to the commonly used half-bridge submodule as it demonstrates reduction in the number of conducting switches for all voltage levels and it requires less isolated supply for gate drivers. Experimental results of a single-phase 9-level prototype with SHEPWM verified the feasibility of the proposed HCMLI.

 

REFERENCES:

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  • Teichmann and S. Bernet, “A Comparison of Three-Level Converters versus Two-Level Converters for Low-Voltage Drives, Traction, and Utility Applications,” IEEE Trans. Ind. Appl., vol. 41, no. 3, pp. 855–865, 2005.
  • Yuan, “Derivation of Voltage Source Multilevel Converter Topologies,” IEEE Trans. Ind. Electron., vol. 64, no. 2, pp. 966–976, 2017.
  • K. Gupta, A. Ranjan, P. Bhatnagar, L. K. Sahu, and S. Jain, “Multilevel Inverter Topologies with Reduced Device Count: A Review,” IEEE Trans. Power Electron., vol. 31, no. 1, pp. 135–151, 2016.

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