ZSI for PV systems with LVRT capability

ABSTRACT:

This study proposes a power electronics interface (PEI) for photovoltaic (PV) applications with a wide range of ancillary services. As the penetration of distributed generation systems is booming, the PEI for renewable energy sources should be capable of providing ancillary services such as reactive power compensation and low-voltage ride through (LVRT). This study proposes a robust model predictive-based control strategy for grid-tied Z-source inverters (ZSIs) for PV applications with LVRT capability. The proposed system has two operation modes: normal grid condition and grid fault condition modes. In normal grid condition mode, the maximum available power from the PV panels is injected into the grid. In this mode, the system can provide reactive power compensation as a power conditioning unit for ancillary services from DG systems to main ac grid. In case of grid faults, the proposed system changes the behavior of reactive power injection into the grid for LVRT operation according to the grid requirements. Thus, the proposed controller for ZSI is taking into account both the power quality issues and reactive power injection under abnormal grid conditions. The proposed system operation is verified experimentally, the results demonstrate fast dynamic response, small tracking error in steady-state, and simple control scheme.

 

SOFTWARE: MATLAB/SIMULINK

  

BLOCK DIAGRAM:

Fig. 1 General schematic representation of the proposed PEI based on the ZSI for grid-tied PV application with LVRT capability 

  

EXPECTED SIMULATION RESULTS

Fig. 2 System performance evaluation in steady-state MPPT mode and transition between LVRT and MPPT modes (a) Grid voltage (vg), grid current (ig), inductor L1 current (IL1), and pulsating dc-link voltage (Vdc) when the system is operating in MPPT mode and unit power factor in normal grid condition, (b) Grid voltage (vg), grid current (ig), inductor L1 current (IL1), and pulsating dc-link voltage (Vdc) when the system is operating in MPPT mode and unit power factor in normal grid condition with distorted grid voltage, (c) Grid voltage (vg), grid current (ig), inductor L1 current (IL1), and pulsating dc-link voltage (Vdc) when the 25% gridvoltage sag  occurs at t1 and the system changes its mode of operation from MPPT to LVRT with reactive current injection, (d) Grid voltage (vg), grid current (ig), inductor L1 current (IL1), and pulsating dc-link voltage (Vdc) when the grid goes back to normal condition at t2 and the system changes its mode from LVRT to MPPT with unity power factor

Fig. 3 System performance evaluation to changes in solar irradiance in MPPT and LVRT modes (a) Grid voltage (vg), grid current (ig), inductor L1 current (IL1), and pulsating dc-link voltage (Vdc) with a step change in solar irradiance level from 1000 to 700 W/m2 at time t3 when the system is operating in MPPT mode under normal grid condition, (b) Grid voltage (vg), grid current (ig), inductor L1 current (IL1), and pulsating dc-link voltage (Vdc) with step change in solar irradiance level from 700 to 1000 W/m2 at time t4 when the system is operating in LVRT mode and 25% grid voltage sag

Fig. 4 Active and reactive powers when the grid voltage sag of 25% occurs for time intervals t1–t2. The system is operating in normal grid condition before t1 and after t2

 

CONCLUSION:

This paper proposes a single-stage PEI based on impedance-source inverter for PV applications with LVRT capability during the grid voltage sag according to grid standards. By using the MPC framework, a simple control strategy is proposed with an adaptive cost function to seamlessly operate under normal and faulty grid conditions. The proposed system eliminates the requirements of multi–nested-loop of classical controller. Owing to the predictive nature of the controller, the proposed system has fast dynamic response to change in solar irradiance or grid reactive power requirement according to LVRT operation. The system is switching between LVRT and MPPT modes of operations seamlessly. The proposed system can be extended for overnight operation of PV sources in DGs with reactive power compensation capability as ancillary service from DG to main grid. Several experiments have been conducted to verify the performance of the proposed system. The results demonstrate robust operation, MPP operation during the healthy grid condition, high-power quality injection during steady-state condition, negligible overshoot/undershoot in grid current injection due to change in solar irradiance or reactive power reference, no observation of inrush current during dynamic change in MPC cost function references for LVRT operation, and maintaining constant peak grid current during the LVRT mode.

 

REFERENCES:

  • Cho, Y.W., Cha, W.J., Kwon, J.M., et al.: ‘Improved single-phase transformerless inverter with high power density and high efficiency for grid connected photovoltaic systems’, IET Renew. Power Gener., 2016, 10, pp. 166–174
  • Guo, X.Q., Wu, W.Y.: ‘Improved current regulation of three-phase grid connected voltage-source inverters for distributed generation systems’, IET Renew. Power Gener., 2010, 4, pp. 101–115
  • Hosseinzadeh, M., Salmasi, F.R.: ‘Power management of an isolated hybrid AC/DC micro-grid with fuzzy control of battery banks’, IET Renew. Power Gener., 2015, 9, pp. 484–493
  • Shadmand, M.B., Mosa, M., Balog, R.S., et al.: ‘Model predictive control of a capacitorless matrix converter-based STATCOM’, IEEE J. Emerg. Sel. Top. Power Electron., 2017, 5, pp. 796–808
  • Momeneh, A., Castilla, M., Miret, J., et al.: ‘Comparative study of reactive power control methods for photovoltaic inverters in low-voltage grids’, IET Renew. Power Gener., 2016, 10, pp. 310–318

Verification of a low Components Nine-Level Cascaded-Transformer Multilevel Inverter in Grid- Tie Mode

ABSTRACT:

The main problem related to cascaded H-bridge cells multilevel inverters (CHBs) is their using of a large number of components, such as switches and DC-sources. Therefore, minimization of components in these kinds of devices is of great importance. Cascaded transformers multilevel inverters (CTMIs) have completely eliminated the need for several DC-sources in CHBs. Thus, minimization of the other components in CTMIs can lead to obtain an optimized structure for multilevel inverters. The present paper introduces a simple and compact structure for transformer based multilevel inverters. Since the number of utilized components in the proposed structure is remarkably reduced, the cost, volume and complexity are minimized. The performance of the suggested inverter has been scrutinized through two different strategies. Firstly, it is tested under condition of supplying a local load, and secondly, employing sample based current control strategy, its performance is inspected when being connected to the grid. In the latter test the leakage inductances of the transformers are utilized to execute the sample based current control strategy, thus, the need for extra filter is eradicated. The feasibility of the suggested topology has been validated by using laboratory-built prototype along with a computer-aid simulated model.

 

KEYWORDS:

  1. Multilevel inverter
  2. Component reduction
  3. Grid-connected converter
  4. Sample based current control

SOFTWARE: MATLAB/SIMULINK

 

CIRCUIT DIAGRAM:

Fig. 1. Proposed topology

 EXPECTED SIMULATION RESULTS

 Fig. 2. Simulation results of the output voltage, load current, FFT analyses, and switches voltages & currents. (a) Output voltage in no load condition, (b) output voltage and load current when supplying the RL load (c) output voltage and load current when supplying the pure resistive load. (d) FFT analysis of the output voltage in no load condition. (e) FFT analysis of the output voltage when supplying the RL load. (f) FFT analysis of the output voltage when supplying the pure resistive load. (g) Voltages and currents of the switches of the two outer legs. (h) Voltages and currents of the switches of the two middle legs. (j) Load and capacitor currents when providing active an reactive power (resistive-inductive loading condition).

Fig.3. Simulation results of grid-tied model. (a) Reference current and injected current. (b) Injected current  and grid voltage. (c) FFT analysis of the injected current

 

CONCLUSION:

This paper put forth a novel nine-level topology for transformer based multilevel inverters. The proposed topology can deservedly reduce switches count of a nine-level single-phase multilevel inverter. To prove the feasibility of the suggested topology, by using a model simulated under Mathlab/Simulink environment and a laboratory-built prototype, it went under two different tests. Firstly, its performance was assessed when supplying a local load. The load was assumed to be either a pure resistive load or a resistive-inductive load. Secondly, employing sample based current control strategy, its performance was inspected under grid-tied condition. By employing a simulated model in the latter test, the proposed topology took the responsibility of delivering an assumed active power of 15kW, and 25kW to the grid. In the experimental test the power value injected to the grid was considered to be 800w. Since the CTMIs mostly use only one DC-source they are a competent candidate in microgrid and PV application. Being based on CTMIs, the proposed topology employs fewer numbers of components and offers the same advantages as the conventional topology does. When adopting the sample based current control strategy in grid-tie applications an inductive element is required to be located between the converter and the grid. In this paper the leakage inductances of the transformers were used as the inductive filter. This facilitated executing the sample based current control strategy and consequently the need for an extra filter is eradicated. The other advantage of using transformers was their providing a galvanic isolation. To sum up, the accomplished tests verified the feasibility and viability of the suggested topology.

 

REFERENCES:

  • Z. Peng, J.W McKeever, D.J. Adams,―A power line conditioner using cascade multilevel inverters for distribution systems,‖ IEEE Trans. Ind. Appl., Vol. 34, no. 6, pp. 1293 – 1298, nov. 1998.
  • M. Tolbert, F. Z. Peng, T.G. Habetler, ―Multilevel converters for large electric drives‖. IEEE Trans. Ind. Appl, Vol. 35, no. 1, pp. 36-44, Aug. 1999.
  • Dixon, J. Pereda, C. Castillo, S. Bosch, ―Asymmetrical multilevel inverter for traction drives using only one DC supply,‖ IEEE Trans Veh, Techno, Vol. 59, no. 8, pp. 3736-3743, Oct. 2010.
  • Poompavai, A. Chitra, C. Srinivas, K. Giridharan, ―A meticulous analysis of induction motor drive fed from a nine-level Cascade H-Bridge inverter with level shifted multi carrier PWM,‖ in Proc. IEEE Int. Conf. on Smart Structures and Systems (ICSSS), 2013, pp 6-12.
  • Suresh, A.K. Panda, ―Research on a cascaded multilevel inverter by employing three-phase transformers,‖ IET Power Electron, Vol. 5, no. 5, pp. 561 – 570, Jun. 2012.

 

Standalone Photovoltaic Water Pumping System Using Induction Motor Drive with Reduced Sensors

ABSTRACT:

A simple and efficient solar photovoltaic (PV) water pumping system utilizing an induction motor drive (IMD) is presented in this paper. This solar PV water pumping system comprises of two stages of power conversion. The first stage extracts the maximum power from a solar PV array by controlling the duty ratio of a DC-DC boost converter. The DC bus voltage is maintained by the controlling the motor speed. This regulation helps in reduction of motor losses because of reduction in motor currents at higher voltage for same power injection. To control the duty ratio, an incremental conductance (INC) based maximum power point tracking (MPPT) control technique is utilized. A scalar controlled voltage source inverter (VSI) serves the purpose of operating an IMD. The stator frequency reference of IMD is generated by the proposed control scheme. The proposed system is modeled and its performance is simulated in detail. The scalar control eliminates the requirement of speed sensor/encoder. Precisely, the need of motor current sensor is also eliminated. Moreover, the dynamics are improved by an additional speed feed forward term in the control scheme. The proposed control scheme makes the system inherently immune to the pump’s constant variation. The prototype of PV powered IMD emulating the pump characteristics, is developed in the laboratory to examine the performance under different operating conditions.

 

KEYWORDS:

  1. Photovoltaic cells
  2. MPPT
  3. Water pumping
  4. Scalar control
  5. Induction motor drives

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1. System architechure for the standalone solar water pumping system 

 

EXPECTED SIMULATION RESULTS

Fig. 2. Starting performance of the proposed system

Fig. 3 Steady state and transient behaviour of proposed system

 

CONCLUSION:

The standalone photovoltaic water pumping system with reduced sensor, has been proposed. It utilizes only three sensors. The reference speed generation for V/f control scheme has been proposed based on the available power the regulating the active power at DC bus. The PWM frequency and pump affinity law have been used to control the speed of an induction motor drive. Its feasibility of operation has been verified through simulation and experimental validation. Various performance conditions such as starting, variation in radiation and steady state have been experimentally verified and found to be satisfactory. The main contribution of the proposed control scheme is that it is inherently, immune to the error in estimation of pump’s constant. The system tracks the MPP with acceptable tolerance even at varying radiation.

 

REFERENCES:

  • Drury, T. Jenkin, D. Jordan, and R. Margolis, “Photovoltaic investment risk and uncertainty for residential customers,” IEEE J. Photovoltaics, vol. 4, no. 1, pp. 278–284, Jan. 2014.
  • Muljadi, “PV water pumping with a peak-power tracker using a simple six-step square-wave inverter,” IEEE Trans. on Ind. Appl., vol. 33, no. 3, pp. 714-721, May-Jun 1997.
  • Sharma, S. Kumar and B. Singh, “Solar array fed water pumping system using induction motor drive,” 1st IEEE Intern. Conf. on Power Electronics, Intelligent Control and Energy Systems (ICPEICES), Delhi, 2016.
  • Franklin, J. Cerqueira and E. de Santana, “Fuzzy and PI controllers in pumping water system using photovoltaic electric generation,” IEEE Trans. Latin America, vol. 12, no. 6, pp. 1049- 1054, Sept. 2014.
  • Kumar and B. Singh, “BLDC Motor-Driven Solar PV Array-Fed Water Pumping System Employing Zeta Converter,” IEEE Trans. Ind. Appl., vol. 52, no. 3, pp. 2315-2322, May-June 2016.

Soft Switched Interleaved DC/DC Converter as front-end of Multi Inverter Structure for Micro Grid Applications

ABSTRACT:

An isolated four channel DC/ DC converter with zero voltage switching (ZVS) is proposed as front-end of multiple inverter structures to integrate renewable and other low voltage energy sources to micro grid. Interleaving technique is adopted to connect each module of proposed converter to a common dc source. This dc source can be a fuel cell stack, PV panels,  battery or any other low voltage dc source. All four channels are interleaved and phase shift of 90o is provided between the gate signals of each channels which reduces the input current ripple.Output port of the proposed converter provide four isolated and regulated dc voltages. These isolated dc sources can be connected in series or parallel or series-parallel manner to obtain required dc link voltage of various inverter structure. Issues like capacitor voltage balancing of diode clamped multilevel inverters can overcome through proposed converter. By incorporating coupled inductor for isolation and energy storage along with voltage multiplier circuit, proposed converter can achieve higher voltage step up with lower turns ratio and lower voltage stress at moderate duty ratio. Hence MOSFETs of low voltage rating (low RDS(ON)) can be utilized to reduce conduction loss. A 2kW prototype of proposed interleaved DC/DC converter is developed and tested with diode clamped three level inverter, five level inverter and three phase two level inverter to verify the design.

 

KEYWORDS:

  1. DC-DC Converter
  2. Zero voltage switching
  3. Active clamp
  4. Interleaving
  5. Coupled inductor
  6. High voltage gain

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

Fig. 1. Proposed Interleaved DC/DC Converter.

 

EXPECTED SIMULATION RESULTS

 Fig. 2. Experimental results at full load for Vin = 55V, (a) Gate signals for main switches of all four channels which are phase shifted by 90o (b) Gate signals for main and clamp switches of channel-a and channel-b. (c) Input current drawn by individual channels at full load (d) Resultant input current drawn from the input source at full load by interleaving operation of all four channels (e) Voltage stress across the main switches of all four channels at full load (f) Soft turn on (ZVS) of main and clamp switches of channel-a, ZVS turn on region is highlighted (g) Voltage stress across the voltage multiplier diodes Da1 and Da2 of channel-a along with input current of same channel (h) Voltage stress across the output diode Dao of channel-a along with voltage stress of diode Da1.

Fig. 3. Experimental results: (a) Phase voltage and current of three level inverter feeding R-L load of 0.85 power factor (b) Regulated and balanced dc link voltage of 3 level diode clamped inverter (c) Phase voltage and current of 5 level diode clamped inverter feeding to R-L load of 0.85 power factor (d) Balanced DC link voltage of five level diode clamped inverter which is regulated by proposed converter (e) Line voltage and current of 2 level full bridge inverter feeding R-L load of 0.85 power Factor.

 

CONCLUSION:

An isolated 4-channel interleaved dc/dc converter with soft switching and high voltage step up gain is proposed as a front end of multiple inverter structures. Proposed converter makes use of isolated coupled inductor and dual voltage multiplier circuit to achieve voltage step up with lower voltage stress on devices. Active clamp circuit is used to clamp the voltage spike on MOSFETs and also to provide soft turn on for MOSFET switches. Interleaved operation enhanced the power output and reduces the input current ripple. Modularity of proposed converter is an added advantage. Four isolated output port of proposed converter can be connected in series, parallel or series-parallel combination to obtain required dc link voltages of multiple commonly used inverter structures like three phase two level inverter, three level NPC and five level NPC inverter structures. Proposed converter can overcome the capacitor voltage balancing issues of five level and three level NPC inverters without any additional voltage balancing circuits. Feasibility of same is experimentally verified and results are shown. By using MOSFETs of low on state resistance, conduction losses are reduced in proposed converter. A 2kW prototype of proposed converter is build and results are verified. Maximum efficiency of proposed converter is found to be 95.83%.

 

REFERENCES:

  • Blaabjerg, Z. Chen, and S. B. Kjaer, “Power electronics as efficient interface in dispersed power generation systems,” IEEE Trans. Power Electron., vol. 19, no. 5, pp. 1184–1194, Sept 2004.
  • Liserre, T. Sauter, and J. Y. Hung, “Future energy systems: Integrating renewable energy sources into the smart power grid through industrial electronics,” IEEE Ind. Electron. Mag., vol. 4, no. 1, pp. 18– 37, March 2010.
  • Zhao, X. Xiang, W. Li, X. He, and C. Xia, “Advanced symmetrical voltage quadrupler rectifiers for high step-up and high output-voltage converters,” IEEE Trans. Power Electron, vol. 28, no. 4, pp. 1622–1631, 2013.
  • S. Solanki, Solar photovoltaics: fundamentals, technologies and applications. PHI Learning Pvt. Ltd., 2011.
  • Sharma and V. Agarwal, “Exact maximum power point tracking of grid-connected partially shaded pv source using current compensation concept,” IEEE Trans. Power Electron., vol. 29, no. 9, pp. 4684–4692, Sept 2014.

Single-stage ZETA-SEPIC-based multifunctional integrated converter for plugin electric vehicles

ABSTRACT:

A single-stage-based integrated power electronic converter has been proposed for plug-in electric vehicles (PEVs). The proposed converter achieves all modes of vehicle operation, i.e. plug-in charging, propulsion and regenerative braking modes with wide voltage conversion ratio (M) [M < 1 as well as M > 1] in each mode. Therefore, a wide variation of battery voltage can be charged from the universal input voltage (90–260 V) and allowing more flexible control for capturing regenerative braking energy and dc-link voltage. The proposed converter has least components compared to those existing converters which have stepping up and stepping down capability in all modes. Moreover, a single switch operates in pulse width modulation in each mode of converter operation hence control system design becomes simpler and easy to implement. To correctly select the power stage switches, a loss analysis of the proposed converter has been investigated in ac/dc and dc/dc stages. Both simulation and experimental results are presented to validate the operation of the converter.

 

SOFTWARE: MATLAB/SIMULINK

  

BLOCK DIAGRAM:

Fig. 1 Block diagram and proposed structure of the integrated converter

(a) Block diagram of PEV with on-board integrated battery charger, (b) Proposed ZETA-SEPIC-based integrated converter for PEVs

  

EXPECTED SIMULATION RESULTS:

Fig. 2 Simulation results

(a) Simulation waveforms during plug-in charging mode with 220 VRMS of grid voltage, (b) Waveforms of propulsion mode, (c) Dynamic operation of propulsion mode with step load variations, (d) Closed loop verification of regenerative braking mode by varying the dc-link voltage

 Fig. 3 Simulation results during plug-in charging mode with 100 V (peak) grid voltage and 60 V battery voltage (a) Waveforms of vg, ig, VCf and ILf , (b) Waveforms of VC and Vb, (c) Simulation results with grid voltage of 90 V

Fig. 4 Simulation waveforms during propulsion and regenerative braking with 60 V battery and 100 V dc link (a) Waveforms in propulsion mode with 400 W load, (b) Dynamic operation of  propulsion mode with load variations, (c) Closed loop verification of regenerative braking mode by varying the dc-link voltage

 

CONCLUSION:

A bridge modular switched-capacitor-based multilevel inverter with optimized UFD-SPWM control method is proposed in the paper. The switched-capacitor-based stage can obtain high conversion efficiency and multiple voltage levels. Meanwhile, it functions as an active energy buffer, enhancing the power decoupling ability and conducing to cut the total size of the twice-line energy buffering capacitance. Furthermore, voltage multi-level in DC-link reduces the switching loss of inversion stage because turn-off voltage stress of switches changes with phase of output voltage rather than always suffers from one relatively high DC voltage. Most importantly, the control method of UFD-SPWM, doubling equivalent witching frequency, is employed in the inversion stage for a high quality output waveform with reduced harmonic. In addition, the optimized voltage level phase maximizes the fundamental component in output voltage pulses to reduce harmonic backflow as possible. Hence, the comprehensive system efficiency has been promoted and up to peak value of 97.6%. Finally, two conversion stages are controlled independently for promoting reliability and decreasing complexity. In future work, detailed loss discussion, including theoretic calculation and validation of loss breakdown, will be presented.

 

REFERENCES:

  • Jun, “A new selective loop bias mapping phase disposition PWM with dynamic voltage balance capability for modular multilevel converter,” IEEE Trans. Ind. Electron., vol. 61, no. 2, pp. 798-807, Feb. 2014.
  • Mehdi, and G. Moschopoulos, “A novel single-stage multilevel type full-bridge converter,” IEEE Trans. Ind. Electron., vol. 60, no. 1, pp. 31-42, Jan. 2013.
  • Ehsan and N. B. Mariun, “Experimental results of 47-level switchladder multilevel inverter,” IEEE Trans. Ind. Electron., vol. 60, no. 11, pp. 4960-4967, Nov. 2013.
  • Lai, “Power conditioning circuit topologies,” IEEE Trans. Ind. Electron., vol. 3, no. 2, pp. 24-34, Jun. 2009.
  • He, C. Cheng, “Flying-Capacitor-Clamped Five-Level Inverter Based on Switched-Capacitor Topology,” IEEE Trans. Ind. Electron., vol. 63, no.12, pp. 7814-7822, Sep. 2016.

Power-decoupling of a Multi-port Isolated Converter for an Electrolytic-capacitor less Multi-level Inverter

ABSTRACT:

This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for multilevel inverter, which has multiple DC-links inside. In the proposed method, a single power-decoupling capacitor is needed for all the DC-links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half bridge converter (MDHB) is used for the power-decoupling circuit. Steady state analysis for the peak and root-mean-square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase-shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed that takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the DC-links without individual link-current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average voltage-control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power-decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase-margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware-prototype experimental results.

 

KEYWORDS:

  1. Multilevel inverter
  2. Cascaded H-bridge inverter
  3. Multiport isolated converter
  4. Multiport transformer
  5. Active power-decoupling

 

SOFTWARE: MATLAB/SIMULINK

  

BLOCK DIAGRAM:

Fig.1: The proposed single decoupling capacitor power-decoupling circuit for a cascaded H-bridge multi-level inverter.

  

EXPECTED SIMULATION RESULTS

(a)

(b)

Fig. 2 (a): Key waveforms of numerical analysis: DC-Link voltages of all the three cells of multilevel inverter (Vdc1, Vdc2, Vdc3), voltage across the power-decoupling capacitor (Vopd), and output voltage of the multilevel inverter (VO); and (b) Experimental key waveforms: DC-Link voltage, output voltage of the multilevel inverter, and Voltage across the power-decoupling Capacitor. Both results agree well with each other.

Fig. 3. Key waveforms (a) Numerical analysis: Transformer input port 1, IL1 current and output port current Isec, and (b) Hardware experiment: Transformer input port 1 current and the output port current

(a)

(b)

Fig. 4. Transient waveforms (a) Simulation under a load step of the proposed power-decoupling control scheme, and (b) Hardware experiment under a load step of the proposed power-decoupling control scheme

 

CONCLUSION:

A generalized power-decoupling control scheme without current sensors is presented for a symmetric cascaded H-bridge multi-level inverter by using a multi-input port/single output DHB converter as a power-decoupling circuit. Film capacitors are implemented instead of the electrolytic ones, to improve the lifetime and reliability. With the proposed power-decoupling method, the double frequency ripple power at all the DC-links can be directed to a common magnetic circuit, and the total ripple power is able to link to a single power-decoupling capacitor. Hence, a multi-level inverter power-decoupling is achieved by one power-decoupling capacitor. This gives an optimized solution in terms of cost and size. In the multi-port dual half bridge converter, the multi-port transformer is one of the major concerns with regard to the efficiency of the converter. This paper proposed a design methodology for designing the multiport transformer. To design the transformer, expressions of the RMS currents through the transformer are obtained. The transformer’s currents are dependent on the switching frequency, leakage inductance, phase-shift, and the output voltage. The design methodology for the transformer is significant, due to the non-linear and complex behavior of the transformer currents. With the proposed design methodology, the efficiency of the hardware prototype is 95.67% at 1.2 kW. A generalized power-decoupling control for the multi-level inverter is proposed in this paper. The proposed control scheme is of the current-sensorless type, and the fast voltage dynamics based on the sensorless control gives the advantage of using a universal “zero” reference to eliminate the double frequency ripple voltage. Therefore, the proposed control scheme is independent of the multi-level inverter topology, architecture, or control strategies. The bandwidth of the power-decoupling controller can be increased without any inner feedback loop, due to the small capacitance and single-pole behavior of the multi-input/single output bidirectional DHB converter. The analysis and design guidelines of the proposed power-decoupling control scheme are presented. The control design shows the effect of the feedforward controller on the elimination of the DC-link ripple. The proposed power-decoupling method is able to reduce the voltage ripple at all the DC-links in the multi-level inverter to 10% at the DC-links with an equivalent film capacitor of about 100 μF for 1.2 kW. The results of experiments under the steady state and transient operation are obtained through 1.2-kW simulation and hardware tests. The proposed power-decoupling control method for the multi-level inverter by a multi-port DHB converter is verified, and shows a promising ability to provide universal power-decoupling for any type of multi-level inverter.

 

REFERENCES:

  • Elena Villanueva, Pablo Correa, José Rodríguez and Mario Pacas, “Control of a Single-Phase Cascaded H-Bridge Multilevel Inverter for Grid-Connected Photovoltaic Systems”, IEEE Trans. on Ind. Electron. vol. 56, no. 11, pp. 4399-4406, Nov. 2009
  • Bailu Xiao, Lijun Hang, Jun Mei, Member, Cameron Riley, Leon M. Tolbert and Burak Ozpineci, “Modular Cascaded H-Bridge Multilevel PV Inverter With Distributed MPPT for Grid-Connected Applications”, IEEE Trans. Ind. Appl., vol. 51, no. 2, pp.1722-1731, March/April 2015.
  • Samir Kouro, Pablo Lezana, Mauricio Angulo and José Rodríguez, “Multicarrier PWM With DC-Link Ripple Feedforward Compensation for Multilevel Inverters,” IEEE Trans. on Power Electron., Vol. 23, No. 1, pp. 52-59 January 2008.
  • Manoharan; A. Ahmed; J. h. Park, “A PV Power Conditioning System Using Non-Regenerative Single-Sourced Trinary Asymmetric Multilevel Inverter with Hybrid Control Scheme and Reduced Leakage Current,” in IEEE Transactions on Power Electronics , vol.32, no.10, pp.7602-7614, Oct. 2017.

Research on the Unbalanced Compensation of Delta-connected Cascaded H-bridge Multilevel SVG

ABSTRACT:

The paper presents the application of Delta- connected cascaded H-bridge multilevel SVG under unbalanced compensation currents or unbalanced supply voltages. Clustered balancing control for delta-connected SVG can be realized by injecting a zero-sequence current to the delta-loop. But zero-sequence current injection may cause the high peak phase current which may break converter switches. The aim of this paper is to analyze the key factors that affect the maximum output current of the SVG with injecting zero-sequence current and acquire the  quantitative relationship between unbalance compensation capability, the unbalance degree of the supply voltage, the initial phase of negative-sequence voltage, the unbalance degree of the compensation current and the initial phase of negative-sequence current. On this foundation, the valid compensation range of delta-connected SVG under unbalanced conditions is obtained. Furthermore, the compensation characteristic of the negative-sequence current is deduced with the certain supply voltage and the influence of supply voltage variation on the maximum output current for SVG is also considered with the certain compensation current. Finally, the correctness of the relevant theoretical analysis is verified by simulation and experiment.

 

KEYWORDS:

  1. Delta-connected cascaded H-bridge multilevel SVG
  2. Zero-sequence current
  3. Unbalance degree

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig.1. Delta-connected cascaded H-bridge multilevel SVG system configuration

EXPECTED SIMULATION RESULTS: 

 (a) Ki increased from 0 to 20%

(b) Ki increased from 20% to 50%

(c) Ki decreased from 50% to 20% and Ku increased from 0 to 10%

(d) Ku increased from 10% to 40%

Fig.2 Partial enlargement waveforms during sudden change of unbalance degree

 

CONCLUSION:

In this paper, the effect of unbalanced supply voltage and compensation current on the delta-connected SVG has been analyzed. Injecting zero-sequence current into the delta-loop allows maintaining cluster voltage balancing for the SVG. However, it has been shown that zero-sequence current injection may cause the high peak phase current which may break converter switches. In order to guarantee safe and reliable operation of the delta-connected SVG, whose maximum output current level Imax/Ip is chosen as the standard to measured its unbalance compensation capability and the valid compensation range under unbalanced conditions can also be obtained. The unbalance compensation range of the delta-connected structure is limited by the unbalance degree of the supply voltage, the initial phase of negative-sequence voltage, the unbalance degree of the compensation current and the initial phase of negative-sequence current. The quantitative relationship between unbalance compensation capability and other influence factors derived in this paper can provide a good theoretical basis for the parameter design and device selection of the delta-connected cascaded H-bridge multilevel SVG. In addition, the delta-connected SVG is more sensitive to the unbalance degree of the supply voltage than the unbalance degree of the compensation current, and it will be better way for industrial applications aiming at improving the power quality. The simulation and experimental results further verified the rationality and accuracy of the analysis.

  

REFERENCES:

  • Akagi, “Classification, Terminology, and Application of the Modular Multilevel Cascade Converter (MMCC),” IEEE Transactions on Power Electronics, vol. 26, no. 11, pp. 3119-3130, Nov. 2011.
  • Z. Peng and Jih-Sheng Lai, “Dynamic performance and control of a static VAr generator using cascade multilevel inverters,” IEEE Transactions on Industry Applications, vol. 33, no. 3, pp. 748-755, May/Jun 1997.
  • K. Lee, J. S. K. Leung, S. Y. R. Hui and H. S. H. Chung, “Circuit-level comparison of STATCOM technologies,” Power Electronics Specialist Conference, 2003. PESC ’03. 2003 IEEE 34th Annual, 2003, pp. 1777-1784 vol.4.
  • Z. Peng and Jin Wang, “A universal STATCOM with delta-connected cascade multilevel inverter,” 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551), 2004, pp. 3529-3533 Vol.5.
  • Maharjan, S. Inoue, H. Akagi and J. Asakura, “A transformerless battery energy storage system based on a multilevel cascade PWM converter,” 2008 IEEE Power Electronics Specialists Conference, Rhodes, 2008, pp. 4798-4804.

Reduced carrier PWM scheme with unified logical expressions for reduced switch count multilevel inverters

ABSTRACT:

The significant reduction in switch count of symmetrical/asymmetrical reduced switch count multilevel inverters (RSCMLI) topologies has modified the operation of inverter such that the conventional carrier-based pulse width modulation (PWM) schemes such as level-shifted PWM and phase-shifted PWM can no more realise them. To control these RSC-MLI topologies, reduced carrier PWM schemes with modified switching logic gained more prominence. These schemes involve suitable logical expressions to realise the switching states of the inverter. However, these logical expressions vary with topological arrangement and number of levels. Moreover, these schemes produce high total harmonic distortion (THD) in line-voltages. Therefore, to improve the line-voltage THD and generalise the switching logic, a modified reduced carrier PWM scheme with unified logical expressions is presented here. The proposed PWM scheme is directly valid for any topology and can be easily scalable to any number of levels in the inverters. To validate the implementation of the proposed PWM to control any RSC-MLI, experimental studies of various asymmetrical RSC-MLI topologies with the proposed PWM scheme are carried out. Further, to verify the superiority of the proposed scheme in terms of THD, complexity, scalability, and computation burden, its performance is compared with carrier-based PWM schemes reported in the literature.

 

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM: Fig. 1 Seven-level single-phase configuration of RSC-MLI-based MLDCL

  

EXPECTED SIMULATION RESULTS:

 Fig. 2 Phase-voltage waveforms and their corresponding harmonic spectra (scale: X-axis: 4 ms/div and Y-axis: 50 V/div) (a) MLDCL, (b) SSPS, (c) Switched dc sources, (e) E-type, (f) MLDCL with conventional reduced carrier PWM

Fig. 3 Line-voltage waveforms and their corresponding harmonic spectra (scale: X-axis: 10 ms/div and Y-axis: 100 V/div) (a) MLDCL, (b) SSPS, (c) Switched dc sources, (d) Hybrid T-type, (e) E-type, (f) MLDCL with conventional reduced carrier PWM

Fig. 4 Line-current waveforms and their corresponding harmonic spectra (scale: X-axis: 10 ms/div and Y-axis: 2 A/div) (a) MLDCL, (b) SSPS, (c) Switched dc sources, (d) Hybrid T-type, (e) E-type, (f) MLDCL with conventional reduced carrier PWM

  

CONCLUSION:

To overcome the limitations of conventional reduced carrier PWM scheme, this paper presented a modified reduced carrier PWM scheme with unified logical expressions. The efficacy of the proposed switching logic is validated with experimental studies on various 13-level asymmetrical RSC-MLI topologies. Further, superior performance of the proposed scheme is verified by comparing its performance with conventional carrier PWM schemes. Topology-independent operation, simplified switching logic generalization to higher levels, less computation burden, and improved line-voltage THD performance of the proposed reduced carrier PWM scheme serves as a viable solution to overcome the demerits of conventional multicarrier, reduced carrier, and multireference PWM schemes.

 

REFERENCES:

  • Gupta, K.K., Ranjan, A., Bhatnagar, P., et al.: ‘Multilevel inverter topologies with reduced device count: a review’, IEEE Trans. Power Electron., 2016, 31, (1), pp. 135–151
  • Su, G.-J: ‘Multilevel DC-link inverter’, IEEE Trans. Ind. Appl., 2005, 41, (3), pp. 848–854
  • Sanjeevan, A.R., Kaarthik, R.S., Gopakumar, K., et al.: ‘Reduced commonmode voltage operation of a new seven-level hybrid multilevel inverter topology with a single DC voltage source’, IET Power Electron., 2016, 9, (3), pp. 519–528
  • Babaei, E.: ‘A cascade multilevel converter topology with reduced number of switches’, IEEE Trans. Power Electron., 2008, 23, (6), pp. 2657–2664
  • Najafi, E., Yatim, A.H.M.: ‘Design and implementation of a new multilevel inverter topology’, IEEE Trans. Ind. Electron., 2012, 59, (11), pp. 4148–4154

 

 

Rectifier Load Analysis for Electric Vehicle Wireless Charging System

ABSTRACT:

This paper presents the analysis of rectifier load used for electric vehicle (EV) wireless charging system, as well as its applications on compensation network design and system load estimation. Firstly, a rectifier load model is established to get its equivalent input impedance, which contains both resistance and inductance components, and can be independently calculated through the parameters of the rectifier circuit. Then, a compensation network design method is proposed, based on the rectifier load analysis. Furthermore, a secondary side load estimation method and a primary side load estimation method are put forward, which adopt only measured voltages and consider the influence of the rectifier load. Finally, an EV wireless charging prototype is developed, and experimental results have proved that the rectifier equivalent load can be correctly calculated on conditions of different system load resistances, rectifier input inductances, DC voltages, and mutual-inductances.  The experiments also show that rectifier load equivalent inductance will impact system performances, and the proposed methods have good accuracy and robustness in the cases of system parameter variations.

KEYWORDS:

  1. Wireless charging system
  2. Rectifier load
  3. Compensation network design
  4. Load estimation

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1. EV wireless charging system with full-bridge diode rectifier and dual-side LCC compensation networks.

 

EXPECTED SIMULATION RESULTS

Fig.2. Simulation results of Le effects on output power and efficiency.

Fig. 3. Simulated load estimation results of the proposed primary side method, when L1 has the inductance with ±1.5uH errors.

Fig. 4. Simulated load estimation results of the proposed primary side method, when M varies about 23%.

Fig.5. Simulated load estimation errors of the proposed primary side method, when the compensation capacitances vary 25%.

 

CONCLUSION:

This paper presents a systematic analysis of the rectifier load used for EV wireless charging system. The rectifier load model has been established to calculate its equivalent input impedance,  which contains both resistance and inductance components,  and can be independently calculated through the parameters of  the rectifier circuit. Based on the rectifier load analysis, a compensation network design method is proposed to achieve the decoupling design of the primary and secondary side compensation capacitors. Furthermore, a secondary side load estimation method and a primary side load estimation method are put forward, considering the influence of the rectifier load. They adopt only measured voltages to avoid the deviations introduced by different phase delays between measured voltage and current. Finally, the established model, the proposed rectifier load calculation method, compensation network design method, secondary and primary side load estimation methods have been verified, based on the developed EV wireless charging prototype. The experimental results have shown the  following conclusions: the equivalent input impedance of rectifier load is mainly affected by system load resistance and rectifier input inductance; rectifier load equivalent inductance will impact system performances, and should be considered for compensation network design; the proposed load estimation methods have good accuracy, but still need to be improved in further research; the proposed rectifier load calculation method and system load estimation methods all have good robustness on conditions of WCS parameter variations. Although the works in this paper are conducted based on the specific system, they can be extended to more applications, such as wireless charging systems with other rectifier or compensation network topologies, etc. They will be helpful for system design and control to make EV wireless charging systems achieve stable operation and high performance.

 

REFERENCES:

  • Jun, “A new selective loop bias mapping phase disposition PWM with dynamic voltage balance capability for modular multilevel converter,” IEEE Trans. Ind. Electron., vol. 61, no. 2, pp. 798-807, Feb. 2014.
  • Mehdi, and G. Moschopoulos, “A novel single-stage multilevel type full-bridge converter,” IEEE Trans. Ind. Electron., vol. 60, no. 1, pp. 31-42, Jan. 2013.
  • Ehsan and N. B. Mariun, “Experimental results of 47-level switchladder multilevel inverter,” IEEE Trans. Ind. Electron., vol. 60, no. 11, pp. 4960-4967, Nov. 2013
  • Lai, “Power conditioning circuit topologies,” IEEE Trans. Ind. Electron., vol. 3, no. 2, pp. 24-34, Jun. 2009.
  • He, C. Cheng, “Flying-Capacitor-Clamped Five-Level Inverter Based on Switched-Capacitor Topology,” IEEE Trans. Ind. Electron., vol. 63, no.12, pp. 7814-7822, Sep. 2016.

 

Reconfiguration of NPC Multilevel Inverters to Mitigate Short Circuit Faults Using Back-to-Back Switches

ABSTRACT:

The main focus of this paper is to propose a reconfiguration method to mitigate short circuit faults in a neutral point clamped multilevel inverter which is widely used as a power conversion system with distributed energy resources. Existing reconfiguration methods use either a redundant strategy or need a large number of additional devices pre-installed in the circuit; these will increase the bulk and complexity of the system. Most existing control-strategy-based methods distort the phase-to neutral voltage, which results in degradation of power quality. To maintain control-strategy-based reconfiguration, avoid significant change to the circuit topology, and avoid phase voltage distortion, a new and practical reconfiguration method is proposed in this paper. The proposed method is applicable to neural point clamped (NPC) multilevel inverters at any voltage level and can mitigate short circuit faults in any device. A technique of switching series connected switches is selected to combine with the proposed reconfiguration method since it’s a practical design consideration for realistic implementation. MATLAB/Simulink is used to simulate a five-level NPC inverter with non-idealities to verify the proposed reconfiguration method. A five-level NPC is also built and tested to experimentally verify the proposed method. Short circuit faults are injected to different devices and the proposed method is verified to quickly and effectively recover the NPC inverter from these faulty conditions.

 

KEYWORDS:

  1. Fault tolerance
  2. Multilevel inverter
  3. Reconfiguration
  4. Short circuit fault

 

SOFTWARE: MATLAB/SIMULINK

 

BLOCK DIAGRAM:

Fig. 1. Five-level NPC.

 EXPECTED SIMULATION RESULTS:

Fig. 2. Output waveform of healthy condition.

 Fig. 3. Output waveform of transmitting healthy condition to reconfigured condition.

Fig. 4. Output waveform of S1 short circuit fault.

Fig. 5. Output waveform of S3 short circuit fault.

Fig. 6. Output waveform of transmitting S1 short circuit condition to reconfigured condition.

Fig. 7. Output waveform of transmitting S3 short circuit condition to reconfigured condition.

 

CONCLUSION:

A practical reconfiguration method for short circuit faults in NPC MLIs is proposed in this paper, which overcomes several weaknesses of existing reconfiguration methods. The proposed reconfiguration method is applicable to any NPC MLI with any number of voltage levels and can mitigate short circuit faults on any device. Simulations are shown to verify the effectiveness of the proposed reconfiguration method. A hybrid voltage balancing technique is selected and implemented to enhance the performance of the proposed reconfiguration method. A single- phase hardware platform is built and tested in healthy condition and reconfigured condition to demonstrate the effectiveness of the proposed method in mitigating short circuit faults. Future work focuses on achieving the proposed reconfiguration method at higher power and augmenting a fault diagnosis method to engage the proposed method.

 

REFERENCES:

  • urinKhomfoi and L. M. Tolbert, Multilevel book Chapter. The University of Tennessee.[Online]. Available: http://web.eecs.utk.edu/~tolbert/ publications/multilevel_book_chapter.pdf
  • Zhang, Z. Li, M. P. Kazmierkowski GAE, J. Rodriguez, and R. Kennel GAE, “Robust predictive control of three-level npc back-to back converter pmsg wind turbine systems with revised predictions,” in IEEE Transactions on Power Electronics, vol. PP, no. 99, pp. 1-1.
  • Mounica, D. Revathi, and M. Devi Atluri, “Mppt based multilevel inverter controlled grid connected wind power system,” in Proc.2016 International Conference on Signal Processing, Communication, Power and Embedded System (SCOPES), Paralakhemundi, 2016, pp. 128-130.