An Adjustable-Speed PFC Bridgeless Buck Boost Converter-Fed BLDC Motor Drive

 

ABSTRACT

This paper presents a power factor corrected (PFC) bridgeless (BL) buck–boost converter-fed brushless direct current (BLDC) motor drive as a cost-effective solution for low-power applications. An approach of speed control of the BLDC motor by controlling the dc link voltage of the voltage source inverter (VSI) is used with a single voltage sensor. This facilitates the operation of VSI at fundamental frequency switching by using the electronic commutation of the BLDC motor which offers reduced switching losses. A BL configuration of the buck–boost converter is proposed which offers the elimination of the diode bridge rectifier, thus reducing the conduction losses associated with it. A PFC BL buck–boost converter is designed to operate in discontinuous inductor current mode (DICM) to provide an inherent PFC at ac mains. The performance of the proposed drive is evaluated over a wide range of speed control and varying supply voltages (universal ac mains at 90–265 V) with improved power quality at ac mains. The obtained power quality indices are within the acceptable limits of international power quality standards such as the IEC 61000-3-2. The performance of the proposed drive is simulated in MATLAB/Simulink environment, and the obtained results are validated experimentally on a developed prototype of the drive.

KEYWORDS:

  1. Bridgeless (BL) buck–boost converter
  2. Brushless direct current (BLDC) motor
  3. Discontinuous inductor current mode (DICM)
  4. Power factor corrected (PFC)
  5. Power quality.

SOFTWARE: MATLAB/SIMULINK

CIRCUIT DIAGRAM:

 

Fig. 1. Proposed BLDC motor drive with front-end BL buck–boost converter.

EXPECTED SIMULATION RESULTS:

Fig. 2. Steady-state performance of the proposed BLDC motor drive at rated conditions.

Fig. 3. Harmonic spectra of supply current at rated supply voltage and rated loading on BLDC motor for a dc link voltage of (a) 200 V and (b) 50V.

Fig. 4. Dynamic performance of proposed BLDC motor drive during (a) starting, (b) speed control, and (c) supply voltage variation at rated conditions.

Fig. 5. Harmonic spectra of supply current at rated loading on BLDC motor with dc link voltage as 200 V and supply voltage as (a) 90 V and (b) 270 V.

Fig. 6. Steady-state performance of the proposed BLDC motor drive at rated conditions with dc link voltage as (a) 200 V and (b) 50 V.

CONCLUSION

A PFC BL buck–boost converter-based VSI-fed BLDC motor drive has been proposed targeting low-power applications. A new method of speed control has been utilized by controlling the voltage at dc bus and operating the VSI at fundamental frequency for the electronic commutation of the BLDC motor for reducing the switching losses in VSI. The front-end BL buck–boost converter has been operated in DICM for achieving an inherent power factor correction at ac mains. A satisfactory performance has been achieved for speed control and supply voltage variation with power quality indices within the acceptable limits of IEC 61000-3-2. Moreover, voltage and current stresses on the PFC switch have been evaluated for determining the practical application of the proposed scheme. Finally, an experimental prototype of the proposed drive has been developed to validate the performance of the proposed BLDC motor drive under speed control with improved power quality at ac mains. The proposed scheme has shown satisfactory performance, and it is a recommended solution applicable to low-power BLDC motor drives.

REFERENCES

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