A New Cascaded Multilevel Inverter Topology with Galvanic Isolation


This paper presents a new compact three-phase cascaded multilevel inverter (CMLI) topology with reduced device count and high frequency magnetic link. The proposed topology overcomes the predominant limitation of separate DC power supplies, which CMLI always require. The high frequency magnetic link also provides a galvanic isolation between the input and output sides of the inverter, which is essential for various grid-connected applications. The proposed topology utilizes an asymmetric inverter configuration that consists of cascaded H-bridge cells and a conventional three-phase two-level inverter. A toroidal core is employed for the high frequency magnetic link to ensure compact size and high-power density. Compared with counterpart CMLI topologies available in the literatures, the proposed inverter has the advantage of utilizing the least number of power electronic components without compromising the overall performance, particularly when a high number of output voltage levels is required. The feasibility of the proposed inverter is confirmed through extensive simulation and experimentally validated studies.


  1. Cascaded multilevel inverter
  2. Isolated dc-supply
  3. Asymmetric multilevel inverter
  4. High frequency magnetic link



 A new high frequency magnetic linked-based cascaded multilevel inverter is presented in this paper. The proposed concept exhibits several advantageous when compared with counterpart topologies proposed in the literatures. This includes the ability to extend the single-phase inverter to a three-phase structure without tripling the power electronic components as per the current practice in the literatures. Experimental and simulation analyses reveal the feasible applications of the proposed inverter with renewable energy sources of intermittent characteristics. Results also show the performance of the proposed inverter is not significantly impacted during load dynamic changes. The proposed concept is easy to implement as it can employ any cascaded inverter topology within a cascaded stage along with a simple conventional three-phase two-level inverter stage.


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