Modeling and Simulation of Hybrid Wind Solar Energy System using MPPT

ABSTRACT:

The main objective of this paper is to enhance the power transfer capability of grid interfaced hybrid generation system. Generally, this hybrid system is a combination of solar and wind energy systems. In order to get maximum and constant output power from these renewable energy systems at any instant of time, this paper proposes the concept of maximum power tracking techniques. The main concept of this maximum power point tracking controller is used for controlling the Direct Current (DC) to DC boost converter. Finally, the performance of this Maximum Power Point Tracking (MPPT) based Hybrid system is observed by simulating using Matlab/Simulink.

KEYWORDS: MPPT Technique, Solar Energy System, Wind Turbine System

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

image001

Figure 1. Configuration of Hybrid Energy System.

EXPECTED SIMULATION RESULTS:

 image002

Figure 2. Simulation Diagram for Hybrid Wind-PV System.

image003

Figure 3. Output Load Voltage.

image004

Figure 4. Output Load Current.

image005

Figure 5. Powers: Line, Wind, Solar.

image006

Figure 6. Output Voltage from Wind System.

image007

Figure 7. Output Voltage from Wind System.

 CONCLUSION:

Output from solar and a wind system is converted into AC power output by using inverter. In the given time additional load of 5 KW is connected by using Circuit Breaker. Under all operating conditions to meet the load the hybrid system is controlled to give maximum output power. Battery is supporting to wind or solar system to meet the load and Also, simultaneous operation for the same load.

REFERENCES:

  1. Huil J, Bakhshai A, Jain PK. A hybrid wind-solar energy system: A new rectifier stage topology. 2010 25th Annual IEEE Proceedings of Applied Power Electronics Conference and Exposition (APEC); 2010 Feb 21–25. p. 156–61.
  2. Kim SK, Jeon JH, Cho CH, Ahn JB, Kwon SH. Dynamic modeling and control of a grid-connected hybrid genera­tion system with versatile power transfer. IEEE Transactions on Industrial Electronics. 2008 Apr; 55(4):1677–88.
  3. Ezhilarasan S, Palanivel P, Sambath S. Design and devel­opment of energy management system for DG source allocation in a micro grid with energy storage system. Indian Journal of Science and Technology. 2015 Jun; 8(13):58252.
  4. Patel MR. Wind and solar power systems design analysis and operation. 2nd ed. Taylor and Francis Group Publishing Co. 2006; 30(3):265–6.
  5. Chen YM, Liu YC, Hung SC, Cheng CS. Multi-input inverter for grid-connected hybrid PV/wind power system. IEEE Transactions on Power Electronics. 2007 May; 22(3):1070–7.

 

Comprehensive Study of Single-Phase AC-DC Power Factor Corrected Converters with High-Frequency Isolation

ABSTRACT: Solid-state switch mode AC-DC converters having high-frequency transformer isolation are developed in buck, boost, and buck-boost configurations with improved power quality in terms of reduced total harmonic distortion (THD) of input current, power-factor correction (PFC) at AC mains and precisely regulated and isolated DC output voltage feeding to loads from few Watts to several kW. This paper presents a comprehensive study on state of art of power factor corrected single-phase AC-DC converters configurations, control strategies, selection of components and design considerations, performance evaluation, power quality considerations, selection criteria and potential applications, latest trends, and future developments. Simulation results as well as comparative performance are presented and discussed for most of the proposed topologies.

 

INDEX TERMS: AC-DC converters, harmonic reduction, high-frequency (HF) transformer isolation, improved power quality converters, power-factor correction.

 

SOFTWARE: MATLAB/SIMULINK

image001

Fig. 1. Classification of improved power quality single-phase AC-DC converters with HF transformer isolation.

CIRCUIT CONFIGURATIONS

A. Buck AC-DC Converters

image002         image003

Fig. 2. Buck forward AC-DC converter with voltage follower control.

Fig. 3. Buck push-pull AC-DC converter with voltage follower control.

                                           image004       image005

 

 

 

 

Fig. 4. Half-bridge buck AC-DC converter with voltage follower control.

Fig. 5. Buck full-bridge AC-DC converter with voltage follower control

 B. Boost AC-DC Converters

image006     image007

Fig. 6. Boost forward AC-DC converter with current multiplier control.

Fig. 7. Boost push-pull AC-DC converter with current multiplier control.

image008     image009

Fig. 8. Boost half-bridge AC-DC converter with current multiplier control.

Fig. 9. Boost full-bridge AC-DC converter with current multiplier control.

 C. Buck-Boost AC-DC Converters

image010           image011

Fig. 10. Flyback AC-DC converter with current multiplier control.

Fig. 11. Cuk AC-DC converter with voltage follower control.

image012      image013

Fig. 12. SEPIC AC-DC converter with voltage follower control.

Fig. 13. Zeta AC-DC converter with voltage follower control.

 

SIMULATION RESULTS:

image014

Fig. 14. Current waveforms and its THD for buck AC-DC converter topologies in CCM. (a) Forward buck topology (Fig. 2).( b) Push-pull buck topology (Fig. 3). (c) Half-bridge buck topology (Fig. 4). (d) Bridge buck topology (Fig. 5).

image015

Fig. 15. Current waveforms and its THD for boost AC-DC converter topologies in CCM. (a) Forward boost topology (Fig. 6). (b) Push-pull boost topology (Fig. 7). (c) Half-bridge boost topology (Fig. 8). (d) Bridge boost topology (Fig. 9).

image016

Fig. 16. Current waveforms and its THD for buck-boost AC-DC converter topologies in CCM. (a) Flyback topology (Fig. 10). (b) Cuk topology (Fig. 11). (c) SEPIC topology (Fig. 12). (d) Zeta topology (Fig. 13).

image017

Fig. 17. Current waveforms and its THD for buck AC-DC converter topologies in DCM. (a) Forward buck topology (Fig. 2). (b) Push-pull buck topology (Fig. 3). (c) Half-bridge buck topology (Fig. 4). (d) Bridge buck topology (Fig. 5).

image018

Fig. 18. Current waveforms and its THD for boost AC-DC converter topologies in DCM. (a) Forward boost topology (Fig. 6). (b) Push-pull boost topology (Fig. 7).

image019

Fig. 19. Current waveforms and its THD for buck-boost AC-DC converter topologies in DCM. (a) Flyback topology (Fig. 10). (b) Cuk topology (Fig. 11). (c) SEPIC topology (Fig. 12). (d) Zeta topology (Fig. 13).

 

CONCLUSION

A comprehensive review of the improved power quality HF transformer isolated AC-DC converters has been made to present a detailed exposure on their various topologies and its design to the application engineers, manufacturers, users and researchers. A detailed classification of these AC-DC converters into 12 categories with number of circuits and concepts has been carried out to provide easy selection of proper topology for a specific application. These AC-DC converters provide a high level of power quality at AC mains and well regulated, ripple free isolated DC outputs. Moreover, these converters have been found to operate very satisfactorily with very wide AC mains voltage and frequency variations resulting in a concept of universal input. The new developments in device technology, integrated magnetic and microelectronics are expected to provide a tremendous boost for these AC-DC converters in exploring number of additional applications. It is hoped that this exhaustive design and simulation of these HF transformer isolated AC-DC converters is expected to be a timely reference to manufacturers, designers, researchers, and application engineers working in the area of power supplies.

 

REFERENCES

[1] IEEE Recommended Practices and Requirements for Harmonics Control in Electric Power Systems, IEEE Standard 519, 1992.

[2] Electromagnetic Compatibility (EMC) – Part 3: Limits- Section 2: Limits for Harmonic Current Emissions (equipment input current 􀀀16 A per phase), IEC1000-3-2 Document, 1st ed., 1995.

[3] A. I. Pressman, Switching Power Supply Design, 2nd ed. New York: McGraw-Hill, 1998.

[4] K. Billings, Switchmode Power Supply Handbook, 2nd ed. NewYork: McGraw-Hill, 1999.

[5] N. Mohan, T. Udeland, and W. Robbins, Power Electronics: Converters, Applications and Design, 3rd ed. New York: Wiley, 2002.

Digital Simulation of the Generalized Unified Power Flow Controller System with 60-Pulse GTO-Based Voltage Source Converter

 

ABSTRACT:

The Generalized Unified Power Flow Controller (GUPFC) is a Voltage Source Converter (VSC) based Flexible AC Transmission System (FACTS) controller for shunt and series compensation among the multiline transmission systems of a substation. The paper proposes a full model comprising of 60-pulse Gate Turn-Off thyristor VSC that is constructed becomes the GUPFC in digital simulation system and investigates the dynamic operation of control scheme for shunt and two series VSC for active and reactive power compensation and voltage stabilization of the electric grid network. The complete digital simulation of the shunt VSC operating as a Static Synchronous Compensator (STATCOM) controlling voltage at bus and two series VSC operating as a Static Synchronous Series Capacitor (SSSC) controlling injected voltage, while keeping injected voltage in quadrature with current within the power system is performed in the MATLAB/Simulink environment using the Power System Block set (PSB). The GUPFC, control system scheme and the electric grid network are modeled by specific electric blocks from the power system block set. The controllers for the shunt VSC and two series VSCs are presented in this paper based on the decoupled current control strategy. The performance of GUPFC scheme connected to the 500-kV grid is evaluated. The proposed GUPFC controller scheme is fully validated by digital simulation.

KEYWORDS:

60-Pulse GTO Thyristor Model VSC, UPFC, GUPFC,Active and Reactive Compensation, Voltage Stability

SOFTWARE: MATLAB/SIMULINK

BLOCK DIAGRAM:

UPFC with 60-Pulse GTO-Based Voltage Source Converter

Figure 1. Three-bus system with the GUPFC at bus B5 and B2

EXPECTED SIMULATION RESULTS:

2

 Figure 2. Sixty-pulse VSC output voltage

3

Figure 3. Simulated results of the GUPFC .shunt converter operation for DC voltage with Qref = 0.3pu; 0.5 pu

4

Figure 4. Simulated results of the GUPFC series converter operation Pref=8.7pu; 10pu, Qref=-0.6pu; 0.7pu

5

Figure 5. Simulated results of the GUPFC series converter operation Pref=7.7pu; 9.0pu, Qref=-0.5pu; 0.9pu

6

Figure 6. Digital simulation results for the decoupled current controller schemes for the shunt VSC in a weak power system

 CONCLUSION:

The paper presents and proposes a novel full 60-pulse GTO voltage source converter that it constructed becomes GUPFC FACTS devices. It comprises the full 60-pulse VSC-cascade models connected to the grid network through the coupling transformer. These full descriptive digital models are validated for voltage stabilization, active and reactive compensation and dynamically power flow control using three decoupled current control strategies. The control strategies implement decoupled current control switching technique to ensure accountability, minimum oscillatory behavior, minimum inherent phase locked loop time delay as well as system instability reduced impact due to a weak interconnected ac system and ensures full dynamic regulation of the bus voltage (VB), the series voltage injected and the dc link voltage Vdc. The 60-pulse VSC generates less harmonic distortion and reduces power quality problems in comparison to other converters such as (6,12,24 and 36) pulse. In the synchronous reference frame, a complete model of a GUPFC has been presented and control circuits for the shunt and two series converters have been described. The simulated results presented confirm that the performance of the proposed GUPFC is satisfactory for active and reactive power flow control and independent shunt reactive compensation.

 REFERENCES:

[1] K. K. Sen, “SSSC-static synchronous series compensator. Theory, modeling and application”, IEEE Transactions on Power Delivery, Vol. 13, No. 1, pp. 241-246, January 1998.

[2] B. Fardanesh, B. Shperling, E. Uzunovic, and S. Zelingher, “Multi-Converter FACTS Devices: The Generalized Unified Power Flow Controller (GUPFC),” in IEEE 2000 PES Summer Meeting, Seattle, USA, July 2000.

[3] N. G. Hingorani and L. Gyugyi, “Understanding FACTS, Concepts and Technology of Flexible AC Transmission Systems. Pscataway, NJ: IEEE Press. 2000.

[4] X. P. Zang, “Advanced Modeling of the Multicontrol Func-tional Static Synchronous Series Compensator (SSSC) in Newton Power Flow” , IEEE Transactions on Power Systems, Vol. 20, No. 4, pp. 1410-1416, November 2005,

[5] A. H. Norouzi and A. M. Sharaf, Two Control Schemes to Enhance the Dynamic Performance of the Statcom and Sssc”, IEEE Transactions on Power Delivery, Vol. 20, No. 1, pp. 435-442, January 2005.

 

 

A Two-Level, 48-Pulse Voltage Source Converter for HVDC Systems

ABSTRACT

This paper deals with an analysis, modeling and control of a two level 48-pulse voltage source converter for High Voltage DC (HVDC) system. A set of two-level 6-pulse voltage source converters (VSCs) is used to form a 48-pulse converter operated at fundamental frequency switching (FFS). The performance of the VSC system is improved in terms of reduced harmonics level at FFS and THD (Total Harmonic Distribution) of voltage and current is achieved within the IEEE 519 standard. The performance of the VSC is studied in terms of required reactive power compensation, improved power factor and reduced harmonics distortion. Simulation results are presented for the designed two level multipulse converter to demonstrate its capability. The control algorithm is disused in detail for operating the converter at fundamental frequency switching.

 KEYWORDS

Two-Level Voltage Source Converter

HVDC Systems

Multipulse

Fundamental Frequency Switching

Harmonics.

 SOFTWARE: MATLAB/SIMULINK

 BLOCK DIAGRAM:

1

Fig. 1 A 48-Pulse voltage source converter based HVDC system configuration

 EXPECTED SIMULATION RESULTS:

2

Fig. 2 Steady state performance of proposed 48-pulse voltage source converter

3 4

Fig. 3 Dynamic performance of proposed 48-pulse voltage source converter

 5 6

 Fig. 4 Waveforms and harmonic spectra of 48-pulse converter (a) supply voltage (b) supply current (c) converter voltage

 CONCLUSION

A 48-pulse two-level voltage source converter has been designed, modeled and controlled for back-to-back HVDC system. The transformer connections with appropriate phase shift have been used to realize a 48-pulse converter along with a control scheme using a set of two level six pulse converters. The operation of the designed converter configuration has been simulated and tested in steady sate and transient conditions which have demonstrated the quite satisfactory converter operation. The characteristic harmonics of the system has also improved by the proposed converter configuration.

 REFERENCES

[1] J. Arrillaga, Y. H. Liu and N. R. Waston, “Flexible Power Transmission, The HVDC Options,” John Wiley & Sons, Ltd, Chichester, UK, 2007.

[2] Gunnar Asplund Kjell Eriksson and kjell Svensson, “DC Transmission based on Voltage Source Converter,” in Proc. of CIGRE SC14 Colloquium in South Africa 1997, pp.1-8.

[3] Y. H. Liu R. H. Zhang, J. Arrillaga and N. R. Watson, “An Overview of Self-Commutating Converters and their Application in Transmission and Distribution,” in Conf. IEEE/PES Trans. and Distr.Conf. & Exhibition, Asia and Pacific Dalian, China 2005.

[4] B. R. Anderson, L. Xu, P. Horton and P. Cartwright, “Topology for VSC Transmission,” IEE Power Engineering Journal, vol.16, no.3, pp142- 150, June 2002.

[5] G. D. Breuer and R. L. Hauth, “HVDC’s Increasing Poppularity”, IEEE Potentials, pp.18-21, May 1988.

A Two-Level 24-Pulse Voltage Source Converter with Fundamental Frequency Switching for HVDC System

 ABSTRACT

This paper manages the execution investigation of a two-level, 24-beat Voltage Source Converters (VSCs) for High Voltage DC (HVDC) framework for power quality enhancement. A two dimension VSC is utilized to understand a 24-beat converter with least exchanging misfortune by working it at fundamental recurrence exchanging (FFS). The execution of this converter is contemplated on different issues, for example, consistent state activity, dynamic conduct, responsive power pay, control factor amendment, and sounds mutilation. Reproduction results are exhibited for a two dimension 24-beat converter to show its ability.

 BLOCK DIAGRAM:

 1

 Fig. 1 A 24-Pulse voltage source converter based HVDC system Configuration

EXPECTED SIMULATION RESULTS

 2

Fig. 2 Synthesis of Stepped AC voltage waveform of 24-pulse VSC.

 

3

Fig. 3 Steady state performance of proposed 24-pulse voltage source Converter

4

Fig. 4 Dynamic performance of proposed 24-pulse voltage source converter

 

5

Fig. 5 Waveforms and harmonic spectra of 24-pulse covnerter i) supply voltage ii) supply current (iii) converter voltage

CONCLUSION

A two dimension, 24-beat voltage source converter has been structured and its execution has been approved for HVDC framework to enhance the power quality with major recurrence exchanging. Four indistinguishable transformers have been utilized for stage move and to understand a 24-beat converter alongside control conspire utilizing a two dimension voltage source converter topology. The enduring state and dynamic execution of the planned converter setup has been exhibited the very attractive task and found appropriate for HVDC framework. The trademark sounds of the converter framework has likewise enhanced by the proposed converter design with least exchanging misfortunes without utilizing additional sifting necessities contrasted with the ordinary 12-beat thyristor converter.

 

 

A New Control Strategy for Active and Reactive Power Control of Three-Level VSC Based HVDC System

ABSTRACT

This paper displays another control procedure no doubt and ready power control of three-level multipulse voltage source converter based High Voltage DC (HVDC) communication plan working at Fundamental Frequency Switching (FFS). A three-level voltage source converter change the regular two-level VSC and it is determined for the real and reactive power control is each of the four quarter task.

HVDC

Another control method is created for produce the ready power control by changing the beat width and by keeping the dc connect voltage regular. The enduring state and dynamic showing of HVDC plan joining two unique density arrange are shown for dynamic and responsive forces control.

VSC

Complete capacity of motor apply in the plan are decreased in contrast with two dimension VSCs. The killing of the HVDC plan is also increase as far as decreased music level even at important frequenccy exchanging.

BLOCK DIAGRAM: 1

Fig. 1 A three-level 24-Pulse voltage source converter based HVDC system

 CONTROL SCHEME

2

Fig. 2 Control scheme of three-level VSC based HVDC system using dynamic dead angle (β) Control

EXPECTED SIMULATION RESULTS

3

Fig. 3 Performance of rectifier station during simultaneous real and reactive power control of three-level 24-pulse VSC based HVDC system

4

Fig. 4 Performance of inverter station during simultaneous real and reactive power control of three-level 24-pulse VSC based HVDC system

5

Fig. 5 Variation of angles (δ) and (β) values of three-level 24-pulse VSC based HVDC system during simultaneous real and reactive power control

CONCLUSION

Another control method for three-level 24-beat voltage source converter setup has been planned for HVDC plan. The execution of this 24-beat VSC based HVDC  plan apply the control method has been exhibited in dynamic power control in bidirectional, free control of the ready power and power quality improvement.

HVDC PLAN

Another powerful dead point (β) control has been presented for three-level voltage source converter working at critical recurrence trade. In this control the HVDC plan activity is efficiently shown and furthermore an analysis of (β) esteem

ADAPTABLE

for different responsive power necessity and symphonious execution has been completed in detail. In this way, the determination of converter task locale is more adaptable as indicated by the necessity of the responsive power and power quality.

Analysis and Design of Three-Level, 24-Pulse Double Bridge Voltage Source Converter Based HVDC System for Active and Reactive Power Control

ABSTRACT

This paper control the search, plan and control of a three-level 24-beat Voltage Source Converter (VSC) based High Voltage Direct Current (HVDC) framework. A three dimension VSC active at basic frequency exchanging (FFS) is proposed with 24-pulse VSC structure to improve the power quality and decrease the converter exchanging disaster for high power applications. The structure of three-level VSC converter and plan  parameters, for example, air conditioning inductor and dc capacitor is presented for the proposed VSC based HVDC plan. It comprises of two converter stations encouraged from two diverse air conditioning plan. The dynamic power is replaced between the stations in any case. The ready power is freely controlled in every converter station. The three-level VSC is worked at advanced dead edge (β). A planned control estimation for both the rectifier and an inverter stations for bidirectional dynamic power stream is created weak on FFS and neighborhood responsive power age. This outcomes in a serious decrease in exchanging disaster and maintaining a important distance from the responsive power plant. Recreation is conveyed to confirm the execution of the proposed control calculation of the VSC based HVDC plan for bidirectional dynamic power stream and their autonomous ready power control.

 BLOCK DIAGRAM:

image001

Fig. 1 Three-level 24-pulse double bridge VSC based HVDC system

EXPECTED SIMULATION RESULTS:

image002

Fig. 2a Performance of rectifier station during reactive power control of three level 24-pulse VSC HVDC system

image003

Fig. 2b Performance of Inverter station during reactive power control at rectifier station of three-level 24 pulse VSC HVDC system

image004

Fig. 2c Variation of (δ) and (α) values for rectifier and inverter Stations for reactive power variation of a three-level 24-pulse VSC HVDC system

image005

Fig. 3a Rectifier station during active power reversal of three-level 24-pulse VSC HVDC system

image006

Fig. 3b Inverter station during active power reversal of three-level 24-pulse VSC HVDC system

image007

Fig. 3c Variation of (δ) and (α) values during active power reversal of three level 24-pulse VSC HVDC system.

 CONCLUSION

Another three-level, 24-beat voltage source converter based HVDC plan working at important frequency trade has been planned and its model has been produced and it is efficiently tried for the autonomous control of dynamic and ready forces and suitable dimension consonant condition. The responsive power has been controlled free of the dynamic power at the two conditions.

HVDC

The converter has been efficiently worked in each of the four quadrants of dynamic and responsive forces with the proposed control. The inversion of the dynamic power flow has been make real by switching the course of dc current without changing the limit of dc voltage which is unusuallly troublesome in traditional HVDC plan.

THREE LEVEL

The power nature of the HVDC plan has additionally improve with three-level 24-beat converter task. The symphonious execution of this three-level, 24-beat VSC has been seen to an equal to two-level 48-beat voltage source converter.

A Novel High Step Up DC DC Converter Based on Integrating Coupled Inductor and Switched-Capacitor Techniques for Renewable Energy Applications

ABSTRACT

In this paper, a novel high growth up dc/dc converter is shown for arguable power source use. The planned structure include a connect inductor and two voltage multiplier cells, in order to get high growth up voltage gain.

CAPACITORS

Likewise, two capacitors are charged in the middle of the kill time structure, using the essentiality set away in the coupled inductor which manufactures the voltage trade gain. The essentiality set away in the spillage inductance is reused with the use of a in fasten circuit. The voltage load on the basic power switch is moreover reduce in the planned topology.

RDS

so, a key power switch with low support RDS(ON) can be used to reduce the conduction fact. The action rule and the serious state examinations are consider inside and out. To check the execution of the showed converter, a 300-W lab display circuit is completed. The results confirm the logical  examinations and the chance of the showed high growth up converter.

 CIRCUIT DIAGRAM:

image017

Fig. 1. Circuit configuration of the presented high-step-up converter.

SIMULATION RESULTS:

 image018 image019 image020 image021 image022 image023 image024

Fig. 2. Simulation results under load 300 W.

 CONCLUSION

This paper display another high-progress up dc/dc converter for arguable power source use. The submitted converter is proper for DG systems helpless on useful power sources, which require high-first up voltage trade gain.

INDUCTANCE

The essence set away in the spillage inductance is reused to  improve the execution of the display converter. In addition, voltage load on the main power switch is reduce. In like manner, a switch with a low on-state limit can be select.

CONVERTER

The continuing state task of the converter has been sever in detail. Moreover, the limit condition has been get. Finally, a hardware show is performed which changes over the 40-V input voltage into 400-V produce voltage. The results show the chance of the presented converter.

A Multi-Input Bridgeless Resonant AC-DC Converter for Electromagnetic Energy Harvesting

ABSTRACT

Bridgeless Resonant AC-DC converter in this paper, a novel high development up dc/dc converter is shown for reasonable power source function. The proposed structure contain a coupled inductor and two voltage multiplier cells, in order to get high grown up voltage gain.

COUPLED INDUCTOR

In addition, two capacitors are charged in the midst of the kill time frame, using the essentiality set away in the coupled inductor which gather the voltage trade gain.

AC-DC CONVERTER

Bridgeless Resonant AC-DC converter the exigency set away in the spillage inductance is restate with the usage of an inactive catch circuit. The voltage load on the key power switch is also reduce in the proposed topology. In this manner, an important power switch with low limit RDS(ON) can be used to decrease the conduction adversities.

BRIDGELESS

Bridgeless Resonant AC-DC converter the action rule and the persistent state examinations are explain by and large. To check the execution of the showed converter, a 300-W lab demonstrate circuit is achieved. The results favor the analytical examinations and the possibility of the displayed high development up converter.

 BLOCK DIAGRAM:

image001

image002

Fig. 1. Multi-channel EMR generators and PEI system: (a) conventional PEI; and (b) proposed multi-input PEI.

CIRCUIT DIAGRAM:

image003

Fig. 2. Illustrative scheme of the proposed multi-input converter (v(i)emf: EMF of #i reed; r(i)EMR: coil resistance; L(i)EMR: self-inductance; i(i)EMR: reed terminal current; v(i)EMR: reed terminal voltage; C(i)r1= C(i)r2: resonant capacitors; Lr: resonant inductor; Q(i)r1, Q(i)r2: MOSFETs; Dr: output diode; Co: output capacitor).

EXPERIMENTAL RESULTS:

image004

                                                            (a)

  • image005                                                                    (b)

Fig. 3. Experimental waveforms of power amplifiers: fin = 20 Hz; X-axis: 10 ms/div; Y-axis: (a) vemf = 3 Vrms; Ch1 = output voltage (Vo), 2.5 V/div; Ch2 = terminal voltage (vEMR) of reed #1, 10 V/div; Ch3 = input current (iEMR) of six reeds, 50 mA/div; and (b) vemf = 0.5 Vrms; Ch1 = output voltage (Vo), 0.5 V/div; Ch2 = terminal voltage (vEMR) of reed #1, 5 V/div; Ch3 = sum of the input currents (iEMR) of six reeds, 10 mA/div.

 image006                                                         (a)

image007

  •                                                           (b)

Fig. 4. Experimental waveforms of power amplifiers with step change: X-axis: 40 ms/div; Y-axis: (a) vemf = from 1 Vrms to 2 Vrms; Ch1 = output voltage (Vo), 1 V/div; Ch2 = terminal voltage (vEMR) of reed #1, 5 V/div; Ch3 = input current (iEMR) of six reeds, 50 mA/div; and (b) fin = from 20 Hz to 50 Hz; Ch1 = output voltage (Vo), 0.5 V/div; Ch2 = terminal voltage (vEMR) of reed #1, 5 V/div; Ch3 = input current (iEMR) of six reeds, 50 mA/div.

image008

(a)

image009

  •                                                                 (b)

Fig. 5. Experimental waveforms of EMR generators: X-axis: (a) 20 ms/div; (b) 100 ms/div; Y-axis: (a) constant wind speed; (b) wind speed step change; Ch1 = terminal voltage (vEMR) of reed #2, 5 V/div; Ch2 = output voltage (Vo), 1 V/div; Ch3 = terminal voltage (vEMR) of reed #1, 10 V/div; Ch4 = input current (iEMR) of reed #1, 10 mA/div.

 CONCLUSION

Bridgeless Resonant AC-DC converter in this paper, a novel high progress up dc/dc converter is appeared sensible power source use.

VOLTAGE

Bridgeless Resonant AC-DC converter the proposed structure include a coupled inductor and two voltage multiplier cells, so as to get high growth up voltage gain.

INDUCTOR

Bridgeless Resonant AC-DC  converter moreover, two capacitors are charged between the kill time allocation, utilizing the energy set away in the coupled inductor which collects the voltage exchange gain.

RESONANT

Bridgeless Resonant AC-DC converter the meaning set away in the spillage inductance is reused with the usage of an inactive catch circuit. The voltage stack on the key power switch is additionally reduced in the proposed topology.

RESONANT AC-DC CONVERTER

As such, a fundamental impact switch with low limitation RDS(ON) can be apply to lessen the conduction misfortunes. Bridgeless Resonant AC-DC converter the activity rule and the lasting state examinations are talked about all things considered.

CIRCUIT

To check the execution of the indicated converter, a 300-W lab show circuit is finished .The outcomes support the theoretical examinations and the possibility of the showed high improvement up converter.

High-Efficiency MOSFET Transformerless Inverter for Non-isolated Microinverter Applications

ABSTRACT

Best in class low-control level metal– oxide– semiconductor field-affect transistor (MOSFET)- based transformerless photovoltaic (PV) inverters can achieve high capacity by using latest super union MOSFETs. In any case, these MOSFET-based inverter topologies encounter the suffering forcce of no less than one of these drawbacks:

MOSFET

MOSFET letdown danger from body diode pivot recovery, extended conduction event as a result of more devices, or low magnetics use. By part the conventional MOSFET based stage leg with a up to date inductor, this paper proposes a novel MOSFET-based stage leg plan to reduce these strain. In light of the proposed stage leg structure, a high viability single-arrange

PV

MOSFET transformerless inverter is shown for the PV microinverter applications. The pulsewidth change (PWM) direction and circuit undertaking rule are then describe. The ordinary mode and differential-mode voltage show is then displayed and consider for circuit structure. basic outcomes of a 250Whardware model are look to show the advantages of the proposed transformerless inverter on non-isolated two-sort out PV microinverter application.

 BLOCK DIAGRAM:

image001

Fig. 1. Two-stage nonisolated PV microinverter.

CIRCUIT DIAGRAM:

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Fig. 2. Proposed transformerless inverter topology with (a) separated magnetic and (b) integrated magnetics.

 EXPERIMENTAL RESULTS:

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Fig. 3. Output voltage and current waveforms.

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Fig. 4. PWM gate signals waveforms.

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Fig. 5. Inverter splitting inductor current waveform.

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Fig. 6. Waveforms of voltage between grid ground and DC ground (VEG ).

CONCLUSION

This paper proposes a MOSFET transformerless inverter with a novel MOSFET-based stage leg, which achieve:

1) high ability by apply super interchange MOSFETs and SiC diodes;

2) limited dangers from the MOSFET stage leg by part the MOSFET stage leg with up to date inductor and limiting the di/dt from MOSFET body diode switch recovery;

3) high magnetics use compare and past high ability MOSFET transformerless inverters in [21], [22], [25], which just have half magnetics use.

PWM

The proposed transformerless inverter has no dead-time necessity, basic PWM regulation for usage, and limited high-recurrence CM issue. A 250W hardware model has been planned, created, and tried in two-arrange non isolated micro inverter application. basic outcomes display that the proposed MOSFET transformerless inverter produce 99.01% height effectiveness at full load condition and 98.8% CEC capacity and furthermore produce around 98% attractive use. Because of the benefits of high strength, low CM voltage, and enhanced attractive use, the proposed topology is attractive for two-organize nonisolated PV microinverter applications and transformerless string inverter applications.